English Manual.
Page 9
...® Dual-Core / Conroe-L processors Supports 45nm processor Front Side Bus 1333/1066/800MHz FSB Chipset North Bridge: Intel® G41 South Bridge: Intel® ICH7 Memory 2 x 240-pin DDR3 DIMM sockets Support up to 8GB of system memory Dual channel DDR3 1066/800MHz architecture Audio Realtek 6-channel audio chip (G41MXE) Realtek 8-channel audio chip...
...® Dual-Core / Conroe-L processors Supports 45nm processor Front Side Bus 1333/1066/800MHz FSB Chipset North Bridge: Intel® G41 South Bridge: Intel® ICH7 Memory 2 x 240-pin DDR3 DIMM sockets Support up to 8GB of system memory Dual channel DDR3 1066/800MHz architecture Audio Realtek 6-channel audio chip (G41MXE) Realtek 8-channel audio chip...
English Manual.
Page 31
... like stuttering sound or a less responsive system, reduce the latency. Normally, a default value of the bus. If your operating system comes with support for PCI device latency timer register. The value is set the PCI latency timer. This feature controls how long each PCI device to the bus... if you need to make use . You should keep the setting as too much time may not agree with two or more processors. Advanced BIOS Features CMOS Setup Utility - MPS 1.1 was the original specification. Higher values will have to wait longer before another takes over.
... like stuttering sound or a less responsive system, reduce the latency. Normally, a default value of the bus. If your operating system comes with support for PCI device latency timer register. The value is set the PCI latency timer. This feature controls how long each PCI device to the bus... if you need to make use . You should keep the setting as too much time may not agree with two or more processors. Advanced BIOS Features CMOS Setup Utility - MPS 1.1 was the original specification. Higher values will have to wait longer before another takes over.
English Manual.
Page 35
...; technology (EIST) allows the system to Intel website for other network security measures, IT managers can enable/disable the EIST (Processor Power Management, PPM) through this item. ! CPU Configuration CPU Configuration Help Item Module Version : 3F.0F Sets the ratio Manufacturer... : Intel between CPU Core Clock and the FSB Frequency. ► C1E Support C1E represents Enhanced HALT State. Set Limit CPUID MaxVal to reduce power consumption when in memory by where application code can ...
...; technology (EIST) allows the system to Intel website for other network security measures, IT managers can enable/disable the EIST (Processor Power Management, PPM) through this item. ! CPU Configuration CPU Configuration Help Item Module Version : 3F.0F Sets the ratio Manufacturer... : Intel between CPU Core Clock and the FSB Frequency. ► C1E Support C1E represents Enhanced HALT State. Set Limit CPUID MaxVal to reduce power consumption when in memory by where application code can ...
English Manual.
Page 44
... context. Platform context is assumed that the OS does not save any context. The S5 state is similar to wake from the processor's reset vector after the wake event. The system is going to the S4 state except that the hardware platform has powered off ... Devices Resume by PS2 Keyboard Resume by PS2 Mouse Resume by ACPI. The S4 sleeping state is the lowest power, longest wake latency sleeping state supported by RTC [S3 (STR)] Help Item [Power Off] [Enabled] Select the ACPI [Enabled] state used for [Enabled] System Suspend . [Enabled] [Enabled] [Enabled]...
... context. Platform context is assumed that the OS does not save any context. The S5 state is similar to wake from the processor's reset vector after the wake event. The system is going to the S4 state except that the hardware platform has powered off ... Devices Resume by PS2 Keyboard Resume by PS2 Mouse Resume by ACPI. The S4 sleeping state is the lowest power, longest wake latency sleeping state supported by RTC [S3 (STR)] Help Item [Power Off] [Enabled] Select the ACPI [Enabled] state used for [Enabled] System Suspend . [Enabled] [Enabled] [Enabled]...
