Reference Manual
Page 92
78 VAIO Digital Studio™ Reference Manual Chip Configuration Sub-Menu SDRAM Configuration SDRAM CAS Latency SDRAM RAS to CAS Delay SDRAM RAS Precharge Time SDRAM Cycle Time (Tras, ... [By SPD] User Define 7ns (143MHz) 8ns (125MHz) [3T] [3T] [3T] [6T, 8T] 5T, 7T [All Banks] One Bank [Enabled] Disabled [Enabled] Disabled [64MB] 32MB [UC] USWC [Enabled] Disabled [Disabled] Enabled [Enabled] Disabled [Enabled] Disabled [Both] Primary Secondary Disabled
78 VAIO Digital Studio™ Reference Manual Chip Configuration Sub-Menu SDRAM Configuration SDRAM CAS Latency SDRAM RAS to CAS Delay SDRAM RAS Precharge Time SDRAM Cycle Time (Tras, ... [By SPD] User Define 7ns (143MHz) 8ns (125MHz) [3T] [3T] [3T] [6T, 8T] 5T, 7T [All Banks] One Bank [Enabled] Disabled [Enabled] Disabled [64MB] 32MB [UC] USWC [Enabled] Disabled [Disabled] Enabled [Enabled] Disabled [Enabled] Disabled [Both] Primary Secondary Disabled