English Manual.
Page 9
...processors Supports 45nm processors Front Side Bus 1333/1066/800/533MHz FSB Chipset North Bridge : Intel® G31 Chipset South Bridge : Intel® ICH7 Memory 4 x 240-pin DDR2 DIMM sockets Support...Support hot plug and NCQ (Native Command Queuing ) USB Support hot plug Support up to 8 x USB 2.0 ports (4 rear panel ports, 2 onboard USB headers supporting 4 extra ports) Support... x 4-pin ATX 12V power connector 1 x IDE connector 4 x SATA connectors 2 x USB 2.0 connectors (supporting 4 x USB devices) 1 x CPU fan header (4-pin) 2 x System fan connectors (4-pin) 1 x...
...processors Supports 45nm processors Front Side Bus 1333/1066/800/533MHz FSB Chipset North Bridge : Intel® G31 Chipset South Bridge : Intel® ICH7 Memory 4 x 240-pin DDR2 DIMM sockets Support...Support hot plug and NCQ (Native Command Queuing ) USB Support hot plug Support up to 8 x USB 2.0 ports (4 rear panel ports, 2 onboard USB headers supporting 4 extra ports) Support... x 4-pin ATX 12V power connector 1 x IDE connector 4 x SATA connectors 2 x USB 2.0 connectors (supporting 4 x USB devices) 1 x CPU fan header (4-pin) 2 x System fan connectors (4-pin) 1 x...
English Manual.
Page 36
...refer to insert code in the buffer, the processor disables code execution, preventing damage and worm propagation. Execute Disable Bit allows the processor to enable/disable the Execute Disable Bit feature. This item is used to enable/disable the C1E support. ► Execute Disable Bit This item is... used to lower levels when a HLT (halt) command is supporting this item. ! By combining ...
...refer to insert code in the buffer, the processor disables code execution, preventing damage and worm propagation. Execute Disable Bit allows the processor to enable/disable the Execute Disable Bit feature. This item is used to enable/disable the C1E support. ► Execute Disable Bit This item is... used to lower levels when a HLT (halt) command is supporting this item. ! By combining ...
English Manual.
Page 47
...CPU or chip set context are : S1 - Platform context is similar to a minimum, it wakes. HPET Support [Enabled] HPET Mode [32-bit mode] USB Wake Up from the processor's reset vector after the wake event. (also called Power On Suspend) S2 - The S2 sleeping state ...[Disabled] Power On by Mouse [Disabled] Power On by the OS (for example, Windows2000 or WindowsXP). Control starts from the processor's reset vector after the wake event. AwardBIOS CMOS Setup Utility Power Management Setup ACPI Function ACPI Suspend Type Power Button ��...
...CPU or chip set context are : S1 - Platform context is similar to a minimum, it wakes. HPET Support [Enabled] HPET Mode [32-bit mode] USB Wake Up from the processor's reset vector after the wake event. (also called Power On Suspend) S2 - The S2 sleeping state ...[Disabled] Power On by Mouse [Disabled] Power On by the OS (for example, Windows2000 or WindowsXP). Control starts from the processor's reset vector after the wake event. AwardBIOS CMOS Setup Utility Power Management Setup ACPI Function ACPI Suspend Type Power Button ��...