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R Intel® Pentium® 4 Processor on 90 nm Process Specification Update September 2006 Notice: The Intel® Pentium® processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are documented in this Specification Update. Document Number: 302352-031
R Intel® Pentium® 4 Processor on 90 nm Process Specification Update September 2006 Notice: The Intel® Pentium® processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are documented in this Specification Update. Document Number: 302352-031
Specification Update
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..., device drivers and applications enabled for it. Intel, Pentium, Celeron, Xeon, Intel SpeedStep, Intel Core, VTune and the Intel logo are not intended for more information. See http://www.intel.com/products/processor_number for details. Φ Intel® Extended Memory 64 Technology (Intel® EM64T) requires a computer system with an Intel® Pentium® 4 processor supporting HT Technology and a Hyper-Threading...
..., device drivers and applications enabled for it. Intel, Pentium, Celeron, Xeon, Intel SpeedStep, Intel Core, VTune and the Intel logo are not intended for more information. See http://www.intel.com/products/processor_number for details. Φ Intel® Extended Memory 64 Technology (Intel® EM64T) requires a computer system with an Intel® Pentium® 4 processor supporting HT Technology and a Hyper-Threading...
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R Contents Revision History ...4 Preface...6 Summary Tables of Changes 8 General Information ...21 Identification Information 23 Errata ...30 Specification Changes ...73 Specification Clarifications 74 Documentation Changes 75 § Intel® Pentium® 4 Processor on 90 nm Process Specification Update 3
R Contents Revision History ...4 Preface...6 Summary Tables of Changes 8 General Information ...21 Identification Information 23 Errata ...30 Specification Changes ...73 Specification Clarifications 74 Documentation Changes 75 § Intel® Pentium® 4 Processor on 90 nm Process Specification Update 3
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... the D0 column in Summary Tables of Cycle 9/23/2004 October 2004 November 2004 December 2004 December 2004 January 2005 4 Intel® Pentium® 4 Processor on 90 nm Process Specification Update Revision History R Revision History Revision Number -001 -002 -003 Description • Initial ...added to clarify that C0 errata only apply to 478 pin package • Modified for Processor Identification information Table Notes • Repaired drawings in summary table of changes • Added errata R32-R38 • Updated Processor Identification Table, and Summary Table of Changes ...
... the D0 column in Summary Tables of Cycle 9/23/2004 October 2004 November 2004 December 2004 December 2004 January 2005 4 Intel® Pentium® 4 Processor on 90 nm Process Specification Update Revision History R Revision History Revision Number -001 -002 -003 Description • Initial ...added to clarify that C0 errata only apply to 478 pin package • Modified for Processor Identification information Table Notes • Repaired drawings in summary table of changes • Added errata R32-R38 • Updated Processor Identification Table, and Summary Table of Changes ...
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... • Added errata R116, R117 • Added errata R118, R119, R120 • Added erratum R121 • Added erratum R122, updated processor identification table • Updated R93, added R123, and updated processor identification table § Date February 2005 "Out of Cycle" February 22, 2005 March 2005 April 2005 May 2005 "Out of Cycle... 2005 October 2005 "Out of Cycle" November 14, 2005 December 2005 January 2006 February 2006 March 2006 April 2006 May 2006 June 2006 September 2006 Intel® Pentium® 4 Processor on 90 nm Process Specification Update 5
... • Added errata R116, R117 • Added errata R118, R119, R120 • Added erratum R121 • Added erratum R122, updated processor identification table • Updated R93, added R123, and updated processor identification table § Date February 2005 "Out of Cycle" February 22, 2005 March 2005 April 2005 May 2005 "Out of Cycle... 2005 October 2005 "Out of Cycle" November 14, 2005 December 2005 January 2006 February 2006 March 2006 April 2006 May 2006 June 2006 September 2006 Intel® Pentium® 4 Processor on 90 nm Process Specification Update 5
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...Technology Datasheet On 90 nm Process in 775-land LGA Package and supporting Intel® Extended Memory 64 TechnologyΦ Intel® Pentium® 4 Processor 6xxΔ Sequence and Intel® Pentium® 4 Processor Extreme Edition Datasheet On 90 nm Process in the Nomenclature section of ... table. This document may also contain information that has not been previously published. Affected Documents Document Title Intel® Pentium® 4 Processor on 90 nm Process Specification Update Preface R Preface This document is an update to the specifications contained ...
...Technology Datasheet On 90 nm Process in 775-land LGA Package and supporting Intel® Extended Memory 64 TechnologyΦ Intel® Pentium® 4 Processor 6xxΔ Sequence and Intel® Pentium® 4 Processor Extreme Edition Datasheet On 90 nm Process in the Nomenclature section of ... table. This document may also contain information that has not been previously published. Affected Documents Document Title Intel® Pentium® 4 Processor on 90 nm Process Specification Update Preface R Preface This document is an update to the specifications contained ...
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Errata may cause the Intel® Pentium® processor's behavior to be used to a complex design situation. These changes will be taken to the current published specifications. Specification Changes are ...with each S-Spec number Errata are design defects or errors. Specification Clarifications describe a specification in the next release of the specifications. § Intel® Pentium® 4 Processor on all errata documented for that stepping are present on 90 nm Process Specification Update 7 Products are differentiated by their unique characteristics, e.g., core...
Errata may cause the Intel® Pentium® processor's behavior to be used to a complex design situation. These changes will be taken to the current published specifications. Specification Changes are ...with each S-Spec number Errata are design defects or errors. Specification Clarifications describe a specification in the next release of the specifications. § Intel® Pentium® 4 Processor on all errata documented for that stepping are present on 90 nm Process Specification Update 7 Products are differentiated by their unique characteristics, e.g., core...
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... from the previous version of the errata in Intel's microprocessor Specification Updates: A = Intel® Pentium® II processor B = Mobile Intel® Pentium® II processor C = Intel® Celeron® processor D = Intel® Pentium® II Xeon® processor E = Intel® Pentium® III processor F = Intel® Pentium® processor Extreme Edition G = Intel® Pentium® III Xeon® processor H = Mobile Intel® Celeron® processor at 466 MHz, 433 MHz, 400 MHz, 366...
... from the previous version of the errata in Intel's microprocessor Specification Updates: A = Intel® Pentium® II processor B = Mobile Intel® Pentium® II processor C = Intel® Celeron® processor D = Intel® Pentium® II Xeon® processor E = Intel® Pentium® III processor F = Intel® Pentium® processor Extreme Edition G = Intel® Pentium® III Xeon® processor H = Mobile Intel® Celeron® processor at 466 MHz, 433 MHz, 400 MHz, 366...
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...; M processor X = Intel® Pentium® M processor on 90 nm process with 2-MB L2 cache Y = Intel® Pentium® M processor Z = Mobile Intel® Pentium® 4 processor with 533 MHz system bus AA = Intel® Pentium® processor Extreme Edition and Intel® Pentium® D processor on 65nm process AB = Intel® Pentium® 4 processor on 65 nm process AC = Intel® Celeron® Processor in 478 Pin Package AD = Intel® Celeron® D processor on...
...; M processor X = Intel® Pentium® M processor on 90 nm process with 2-MB L2 cache Y = Intel® Pentium® M processor Z = Mobile Intel® Pentium® 4 processor with 533 MHz system bus AA = Intel® Pentium® processor Extreme Edition and Intel® Pentium® D processor on 65nm process AB = Intel® Pentium® 4 processor on 65 nm process AC = Intel® Celeron® Processor in 478 Pin Package AD = Intel® Celeron® D processor on...
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... No Fix Bus Locks and SMC Detection May Cause the Processor to Hang Temporarily 10 Intel® Pentium® 4 Processor on a Hyper-Threading Technology Enabled Processor R15 X X X X X X X X X No Fix Processor May Hang under Certain Frequencies and 12.5% STPCLK# Duty Cycle... X No Due to Specification R21 X X X X X Fixed Sequence of Changes R NO. C01 D0 LD02 E0 LE02 G11 LG12 LN02 LR02 Plan ERRATA The Processor Signals Page-Fault R10 X X X X X X X X X No Fix Exception (#PF) Instead of Alignment Check Exception (#AC) on an Unlocked CMPXCHG8B Instruction...
... No Fix Bus Locks and SMC Detection May Cause the Processor to Hang Temporarily 10 Intel® Pentium® 4 Processor on a Hyper-Threading Technology Enabled Processor R15 X X X X X X X X X No Fix Processor May Hang under Certain Frequencies and 12.5% STPCLK# Duty Cycle... X No Due to Specification R21 X X X X X Fixed Sequence of Changes R NO. C01 D0 LD02 E0 LE02 G11 LG12 LN02 LR02 Plan ERRATA The Processor Signals Page-Fault R10 X X X X X X X X X No Fix Exception (#PF) Instead of Alignment Check Exception (#AC) on an Unlocked CMPXCHG8B Instruction...
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... Fixed Fence Pending Instruction Page Walks R35 X Fixed Simultaneous Page Faults at Similar Page Offsets on Both Logical Processors of a HyperThreading Technology Enabled Processor May Cause Application Failure R36 X The State of the Resume Flag (RF Fixed Flag) in a Task...) May be Incorrect R37 X X X X X X X X X No Fix Using STPCLK# and Executing Code From Very Slow Memory Could Lead to a System Hang Intel® Pentium® 4 Processor on an FP Instruction R27 X X X X X X X X X No xAPIC May Not Report Some Illegal Fix Vector Errors R28 X X X X X Fixed ...
... Fixed Fence Pending Instruction Page Walks R35 X Fixed Simultaneous Page Faults at Similar Page Offsets on Both Logical Processors of a HyperThreading Technology Enabled Processor May Cause Application Failure R36 X The State of the Resume Flag (RF Fixed Flag) in a Task...) May be Incorrect R37 X X X X X X X X X No Fix Using STPCLK# and Executing Code From Very Slow Memory Could Lead to a System Hang Intel® Pentium® 4 Processor on an FP Instruction R27 X X X X X X X X X No xAPIC May Not Report Some Illegal Fix Vector Errors R28 X X X X X Fixed ...
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... Split may not be Incorrectly Set After an IRET Instruction R48 X Read for Ownership and Fixed Simultaneous Fetch May Cause the Processor to Hang R49 X X Writing the Echo TPR Disable Bit in PAE Paging Stores to Page Tables May Not Be R44...X X X X No Fix Visible to Fixed MSR_LASTBRANCH_0_FROM_LI P MSR Registers R53 X X X X Fixed Recursive Page Walks May Cause a System Hang 12 Intel® Pentium® 4 Processor on 90 nm Process Specification Update Summary Tables of IRET or INTn R45 X X X X X X X Fixed Instructions May Cause Unexpected System Behavior R46...
... Split may not be Incorrectly Set After an IRET Instruction R48 X Read for Ownership and Fixed Simultaneous Fetch May Cause the Processor to Hang R49 X X Writing the Echo TPR Disable Bit in PAE Paging Stores to Page Tables May Not Be R44...X X X X No Fix Visible to Fixed MSR_LASTBRANCH_0_FROM_LI P MSR Registers R53 X X X X Fixed Recursive Page Walks May Cause a System Hang 12 Intel® Pentium® 4 Processor on 90 nm Process Specification Update Summary Tables of IRET or INTn R45 X X X X X X X Fixed Instructions May Cause Unexpected System Behavior R46...
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... RSP Fixed Enhanced Halt State (C1E) Voltage Transition May Affect a System's Power Management in a HyperThreading Technology Enabled Processor Enhanced Halt State (C1E) May X X X No Not Be Entered in a Page-fault Exception Intel® Pentium® 4 Processor on 90 nm Process Specification Update 13 C01 D0 LD02 E0 LE02 G11 LG12 LN02 LR02 Plan ERRATA...
... RSP Fixed Enhanced Halt State (C1E) Voltage Transition May Affect a System's Power Management in a HyperThreading Technology Enabled Processor Enhanced Halt State (C1E) May X X X No Not Be Entered in a Page-fault Exception Intel® Pentium® 4 Processor on 90 nm Process Specification Update 13 C01 D0 LD02 E0 LE02 G11 LG12 LN02 LR02 Plan ERRATA...
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... Before Other Types of Page Fault When Both Occur R67 X Writes to IA32_MISC_ENABLE May Fixed Not Update Flags for Both Logical Processors Threads R68 X Fixed Execute Disable Mode Bit Set with CR4.PAE May Cause Livelock Checking of Page Table Base R69 X...X Fixed Instruction Following a Mode Transition in a Hyper-Threading Enabled Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T). 14 Intel® Pentium® 4 Processor on a Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) L-bit of the CS and LMA bit of ...
... Before Other Types of Page Fault When Both Occur R67 X Writes to IA32_MISC_ENABLE May Fixed Not Update Flags for Both Logical Processors Threads R68 X Fixed Execute Disable Mode Bit Set with CR4.PAE May Cause Livelock Checking of Page Table Base R69 X...X Fixed Instruction Following a Mode Transition in a Hyper-Threading Enabled Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T). 14 Intel® Pentium® 4 Processor on a Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) L-bit of the CS and LMA bit of ...
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... L1 Data Cache Adaptive Mode May Cause Unexpected System Behavior when SMRAM is Mapped to Hang Intel® Pentium® 4 Processor on Processors Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) An REP LODSB or an REP LODSD or an REP LODSQ Instruction with ...32-bit Mode PAE (Page Address Extension) Paging May Cause Processor to Cacheable Memory R85 X CPUID Instruction ...
... L1 Data Cache Adaptive Mode May Cause Unexpected System Behavior when SMRAM is Mapped to Hang Intel® Pentium® 4 Processor on Processors Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) An REP LODSB or an REP LODSD or an REP LODSQ Instruction with ...32-bit Mode PAE (Page Address Extension) Paging May Cause Processor to Cacheable Memory R85 X CPUID Instruction ...
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... Issue Multiple Code Fetches to the Same Cache Line for Systems with Slow Memory 16 Intel® Pentium® 4 Processor on a Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) A 64-Bit Value of Linear Instruction Pointer (LIP) May be Reported X ... May Result in Incorrect Data on Processors Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) Fixed Compatibility Mode STOS Instructions May Alter RSI Register Results on a Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) Fixed LDT Descriptor ...
... Issue Multiple Code Fetches to the Same Cache Line for Systems with Slow Memory 16 Intel® Pentium® 4 Processor on a Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) A 64-Bit Value of Linear Instruction Pointer (LIP) May be Reported X ... May Result in Incorrect Data on Processors Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) Fixed Compatibility Mode STOS Instructions May Alter RSI Register Results on a Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) Fixed LDT Descriptor ...
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... an Interrupt is Pending Fix May Cause an Unexpected Interrupt Access to an Unsupported Address Range in Uniprocessor (UP) or R99 X No Dual-processor (DP) Systems Fix Supporting Intel® Virtualization Technology May Not Trigger Appropriate Actions R100 X No Fix VM Exit Due to a MOV from CR8 May Cause an Unexpected Memory... Tables of VMPTRLD or VMREAD May Cause an Unexpected Memory Access R110 X X X X X No Fix IRET under Certain Conditions May Cause an Unexpected Alignment Check Exception Intel® Pentium® 4 Processor on 90 nm Process Specification Update 17
... an Interrupt is Pending Fix May Cause an Unexpected Interrupt Access to an Unsupported Address Range in Uniprocessor (UP) or R99 X No Dual-processor (DP) Systems Fix Supporting Intel® Virtualization Technology May Not Trigger Appropriate Actions R100 X No Fix VM Exit Due to a MOV from CR8 May Cause an Unexpected Memory... Tables of VMPTRLD or VMREAD May Cause an Unexpected Memory Access R110 X X X X X No Fix IRET under Certain Conditions May Cause an Unexpected Alignment Check Exception Intel® Pentium® 4 Processor on 90 nm Process Specification Update 17
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... 90 nm Process in the 775-land LGA package 18 Intel® Pentium® 4 Processor on 90 nm Process in Incorrect Address Translations Writing Shared Unaligned Data that R120 X X X X X X X X X No Crosses a Cache Line without Fix Proper Semaphores or Barriers May...; 4 processor on 90 nm Process Specification Update Only applies to Activate Dual-monitor X Plan Treatment of SMIs and SMM Fix Ignores Reserved Bit settings in VM-exit Control Field R119 X X X X X X X X X No Fix Using 2M/4M Pages When A20M# Is Asserted May Result in the 478-pin package 2. C01 D0 LD02 E0...
... 90 nm Process in the 775-land LGA package 18 Intel® Pentium® 4 Processor on 90 nm Process in Incorrect Address Translations Writing Shared Unaligned Data that R120 X X X X X X X X X No Crosses a Cache Line without Fix Proper Semaphores or Barriers May...; 4 processor on 90 nm Process Specification Update Only applies to Activate Dual-monitor X Plan Treatment of SMIs and SMM Fix Ignores Reserved Bit settings in VM-exit Control Field R119 X X X X X X X X X No Fix Using 2M/4M Pages When A20M# Is Asserted May Result in the 478-pin package 2. C01 D0 LD02 E0...
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... this erratum may be worked around in this Specification Update revision NO. This erratum applies to Pentium 4 processors for Single-Processor Server/Workstation Platform configurations only. NO. For these steppings, this Specification Update revision § Intel® Pentium® 4 Processor on 90 nm Process Specification Update 19 SPECIFICATION CHANGES R1 Land Assignment Specification Change NO. This...
... this erratum may be worked around in this Specification Update revision NO. This erratum applies to Pentium 4 processors for Single-Processor Server/Workstation Platform configurations only. NO. For these steppings, this Specification Update revision § Intel® Pentium® 4 Processor on 90 nm Process Specification Update 19 SPECIFICATION CHANGES R1 Land Assignment Specification Change NO. This...
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Summary Tables of Changes R 20 Intel® Pentium® 4 Processor on 90 nm Process Specification Update
Summary Tables of Changes R 20 Intel® Pentium® 4 Processor on 90 nm Process Specification Update