Technical Product Specification
Page 63
...displays a message during POST identifying the type of BIOS Features 3.1 Introduction The board uses an Intel BIOS that is stored in configure mode. When the BIOS Setup configuration jumper is set to...the operating system boot begins. The BIOS Setup program is powered-up, the BIOS compares the CPU version and the microcode version in configure mode. 63 The SPI Flash contains the BIOS Setup ...program, POST, the PCI auto-configuration utility, LAN EEPROM information, and Plug and Play support. The BIOS Setup program can be used to put the board in the BIOS and reports if ...
...displays a message during POST identifying the type of BIOS Features 3.1 Introduction The board uses an Intel BIOS that is stored in configure mode. When the BIOS Setup configuration jumper is set to...the operating system boot begins. The BIOS Setup program is powered-up, the BIOS compares the CPU version and the microcode version in configure mode. 63 The SPI Flash contains the BIOS Setup ...program, POST, the PCI auto-configuration utility, LAN EEPROM information, and Plug and Play support. The BIOS Setup program can be used to put the board in the BIOS and reports if ...
Technical Product Specification
Page 77
... APs 0x46 End CPU SMM Init CPU DXE Phase 0x47 CPU DXE Phase begin 0x48 Refresh memory space attributes according to MTRRs 0x49 Load the microcode if needed 0x4A 0x4B Initialize strings to HII database Initialize MP Support 0x4C 0x4D CPU DXE Phase End CPU DXE SMM Phase CPU DXE SMM Phase ...begin 0x4E Relocate SM bases for all APs 0x4F CPU DXE SMM Phase end IO BUSES 0x50 Enumerating PCI buses 0x51 Allocating resources...
... APs 0x46 End CPU SMM Init CPU DXE Phase 0x47 CPU DXE Phase begin 0x48 Refresh memory space attributes according to MTRRs 0x49 Load the microcode if needed 0x4A 0x4B Initialize strings to HII database Initialize MP Support 0x4C 0x4D CPU DXE Phase End CPU DXE SMM Phase CPU DXE SMM Phase ...begin 0x4E Relocate SM bases for all APs 0x4F CPU DXE SMM Phase end IO BUSES 0x50 Enumerating PCI buses 0x51 Allocating resources...