English Manual.
Page 55
... provision of DRAM timing by SPD device. It contains important information about the module's speed, size, addressing mode and various other parameters, so that the motherboard memory controller (chipset) can better access the memory. ► CAS Latency Time (tCL) This item controls the CAS latency, which determines the timing delay (in...
... provision of DRAM timing by SPD device. It contains important information about the module's speed, size, addressing mode and various other parameters, so that the motherboard memory controller (chipset) can better access the memory. ► CAS Latency Time (tCL) This item controls the CAS latency, which determines the timing delay (in...