AL708 Monitor Service Guide
Page 7
.../75/65/60 9 +5V + 5V (for DDC) Color coordinate x=0.313,y=0.329 10 SG Sync GND 11 NC None 4. Driver bit of the cabinet. 1.3 OSD menu includes the following function. CONTRAST BRIGHTNESS H.POSITION V.POSITION COLOR-TEMPERATURE CLOCK PHASE LANGUAGE VOLUME POWER...key. 2. SPECIFICATION 1. CONNECTORS 4.1 AC inlet : CEE22 typed connector 12 SDA 13 HS DDC Data Horizontal Sync 14 VS Vertical Sync 15 SCL DDC Clock L7EA (AL708) 3-1 3. MECHANICAL SPECIFICATIONS 2.1 Dimension Height : 418 mm ( 16.5") Width : 408 mm ( 16") Depth : 183 mm ( 7.2") 2.2 Net Weight :5.6...
.../75/65/60 9 +5V + 5V (for DDC) Color coordinate x=0.313,y=0.329 10 SG Sync GND 11 NC None 4. Driver bit of the cabinet. 1.3 OSD menu includes the following function. CONTRAST BRIGHTNESS H.POSITION V.POSITION COLOR-TEMPERATURE CLOCK PHASE LANGUAGE VOLUME POWER...key. 2. SPECIFICATION 1. CONNECTORS 4.1 AC inlet : CEE22 typed connector 12 SDA 13 HS DDC Data Horizontal Sync 14 VS Vertical Sync 15 SCL DDC Clock L7EA (AL708) 3-1 3. MECHANICAL SPECIFICATIONS 2.1 Dimension Height : 418 mm ( 16.5") Width : 408 mm ( 16") Depth : 183 mm ( 7.2") 2.2 Net Weight :5.6...
AL708 Monitor Service Guide
Page 11
...g) Parallel ROM Interface Port (Pin 8~25, Pin28~35) The gm2120 has parallel ROM interface port , pin8~25 for address bus, pin28~35 for SXGA drivers. 4.1.2 LVDS Transmitter DS90C383 (U1,U2) The DS90C383 transmitter converts 28 bits of TTL data into four LVDS ( Low Voltage Differential Signaling) data streams. A... LCD power sequencing once data and control signals are transmitted at rate of LCD timing and control data ( FPLINE, FPFRAME, DRDY) are stable. L7EA (AL708) 4-2 RAM (U4) SCL 205 GPIO16 / HFSn NV- At a transmit clock frequency of 85 MHz, 24 bits of RGB data and 3 bits ...
...g) Parallel ROM Interface Port (Pin 8~25, Pin28~35) The gm2120 has parallel ROM interface port , pin8~25 for address bus, pin28~35 for SXGA drivers. 4.1.2 LVDS Transmitter DS90C383 (U1,U2) The DS90C383 transmitter converts 28 bits of TTL data into four LVDS ( Low Voltage Differential Signaling) data streams. A... LCD power sequencing once data and control signals are transmitted at rate of LCD timing and control data ( FPLINE, FPFRAME, DRDY) are stable. L7EA (AL708) 4-2 RAM (U4) SCL 205 GPIO16 / HFSn NV- At a transmit clock frequency of 85 MHz, 24 bits of RGB data and 3 bits ...