Service Manual
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... on your telecommunications services. Inc. LGE does not warrant that the equipment provided to maintain telephone service. Copyright © 2008 LG Electronics. B. The user may temporarily disconnect service as long as specifically noted in service to affect the use of the KM710c or compatibility with your telecommunications system. Therefore, note that result...
... on your telecommunications services. Inc. LGE does not warrant that the equipment provided to maintain telephone service. Copyright © 2008 LG Electronics. B. The user may temporarily disconnect service as long as specifically noted in service to affect the use of the KM710c or compatibility with your telecommunications system. Therefore, note that result...
Service Manual
Page 16
... the receiver does not compress under blocking conditions. LGE Internal Use Only The overall gain control range is occurring. Copyright © 2008 LG Electronics. The filtering is performing an auto-calibration, the sequencer cancels the offsets locally around the PGA, then the Digital filter. The ... amplifier. The switches are opened in the pass-band combined with 6dB Steps. 3. HW Circuit Description 3.2.1.1 Baseband PGA/Low pass Filter Specifications The baseband programmable amplifier comprises one stage with an on -chip Chebychev low pass filters. All right reserved.
... the receiver does not compress under blocking conditions. LGE Internal Use Only The overall gain control range is occurring. Copyright © 2008 LG Electronics. The filtering is performing an auto-calibration, the sequencer cancels the offsets locally around the PGA, then the Digital filter. The ... amplifier. The switches are opened in the pass-band combined with 6dB Steps. 3. HW Circuit Description 3.2.1.1 Baseband PGA/Low pass Filter Specifications The baseband programmable amplifier comprises one stage with an on -chip Chebychev low pass filters. All right reserved.
Service Manual
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HW Circuit Description 3.2.4 Front End Module Specification 3.2.4.1 Block Diagram and Internal Matching Condition FEM RC 8R FEM Copyright © 2008 LG Electronics. LGE Internal Use Only All right reserved. 3.2.3 RF Synthesizer 3. Inc. Only for training and service purposes - 19 -
HW Circuit Description 3.2.4 Front End Module Specification 3.2.4.1 Block Diagram and Internal Matching Condition FEM RC 8R FEM Copyright © 2008 LG Electronics. LGE Internal Use Only All right reserved. 3.2.3 RF Synthesizer 3. Inc. Only for training and service purposes - 19 -
Service Manual
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For 3.5V nominal operation -. Built-in LDO circuit -. GPRS Class 12 operation compatible -. Quad band GSM, GPRS & Polar Loop EDGE Amplifier -. Integrated directional coupler 3.2.5.2 Circuit Diagram and peripheral components Current 8.0 mA 8.0 mA 3. HW Circuit Description 3.2.4.2 Logic Table for Selection GSM850_Tx GSM1800 / 1900_Tx GSM850_Rx GSM1800_Rx GSM1900_Rx Vc1 2.6V 0V 0V 0V 0V Vc2 0V 2.6V 0V 0V 0V Band SW Logic Table 3.2.5 Power Amplifier Module for Quad-band GSM/GPRS/EDGE 3.2.5.1 PAM Specification -.
For 3.5V nominal operation -. Built-in LDO circuit -. GPRS Class 12 operation compatible -. Quad band GSM, GPRS & Polar Loop EDGE Amplifier -. Integrated directional coupler 3.2.5.2 Circuit Diagram and peripheral components Current 8.0 mA 8.0 mA 3. HW Circuit Description 3.2.4.2 Logic Table for Selection GSM850_Tx GSM1800 / 1900_Tx GSM850_Rx GSM1800_Rx GSM1900_Rx Vc1 2.6V 0V 0V 0V 0V Vc2 0V 2.6V 0V 0V 0V Band SW Logic Table 3.2.5 Power Amplifier Module for Quad-band GSM/GPRS/EDGE 3.2.5.1 PAM Specification -.
Service Manual
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... (2) the data interface, and a system clock on . The control interface comprise a bidirectional 3-wire serial interface with the digital interface specification DigRF standard v112. The SysClk is used to the internal core logic circuits is a RF transceiver IC for triggering the events. This ...circuits, and for GSM850, GSM900, DCS1800 and PCS1900 quad band cellular system, and incorporates EDGE transceiver capability. Copyright © 2008 LG Electronics. All right reserved. The data interface comprises a single serial bus with the three signal lines RxTxData, RxTxEn and SysClk....
... (2) the data interface, and a system clock on . The control interface comprise a bidirectional 3-wire serial interface with the digital interface specification DigRF standard v112. The SysClk is used to the internal core logic circuits is a RF transceiver IC for triggering the events. This ...circuits, and for GSM850, GSM900, DCS1800 and PCS1900 quad band cellular system, and incorporates EDGE transceiver capability. Copyright © 2008 LG Electronics. All right reserved. The data interface comprises a single serial bus with the three signal lines RxTxData, RxTxEn and SysClk....
Service Manual
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... endpoint EP0 for control, two in/output endpoints EP1/EP2 for bulk data transaction and an EP3 for training and service purposes Copyright © 2008 LG Electronics. Inc. A protection unit allows eight regions of memory to USB 2.0 specification, highspeed (480 Mbps) functions and suspend/resume signaling.
... endpoint EP0 for control, two in/output endpoints EP1/EP2 for bulk data transaction and an EP3 for training and service purposes Copyright © 2008 LG Electronics. Inc. A protection unit allows eight regions of memory to USB 2.0 specification, highspeed (480 Mbps) functions and suspend/resume signaling.
Service Manual
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...to LSB. Generally, for IIS interface; In this block has internal clock controller, it is possible to support SD specification Ver.1.01, SDIO specification Ver1.10, CEATA and MMC specification Ver.3.0. The receive-done interrupt is up to generate a system clock. Inc. Only for detail information. By ...audio application, the DCO function is , the serial bit can be read 8 received words from the system memory Copyright © 2008 LG Electronics. The features of CIF are 2 types of BCLK. The maximum data word size is the serial bit clock for CODEC system clock...
...to LSB. Generally, for IIS interface; In this block has internal clock controller, it is possible to support SD specification Ver.1.01, SDIO specification Ver1.10, CEATA and MMC specification Ver.3.0. The receive-done interrupt is up to generate a system clock. Inc. Only for detail information. By ...audio application, the DCO function is , the serial bit can be read 8 received words from the system memory Copyright © 2008 LG Electronics. The features of CIF are 2 types of BCLK. The maximum data word size is the serial bit clock for CODEC system clock...
Service Manual
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...- 40 - up to HCI level. • Enhanced Data Rate (2&3 Mbps) • Future support for Bluetooth 2005 core release (software upgrade when Bluetooth specification will be available) • Enhanced host interfaces (UART, SDIO) • Very low power consumption • Pin-to-pin compatible with BRF6150 • On-... and service purposes HW Circuit Description 3.6.3 Bluetooth circuit Description • Single chip 90 nm CMOS Bluetooth ROM solution • Bluetooth 1.1, 1.2 and 2.0 specification compliant - Copyright © 2008 LG Electronics. All right reserved. 3.
...- 40 - up to HCI level. • Enhanced Data Rate (2&3 Mbps) • Future support for Bluetooth 2005 core release (software upgrade when Bluetooth specification will be available) • Enhanced host interfaces (UART, SDIO) • Very low power consumption • Pin-to-pin compatible with BRF6150 • On-... and service purposes HW Circuit Description 3.6.3 Bluetooth circuit Description • Single chip 90 nm CMOS Bluetooth ROM solution • Bluetooth 1.1, 1.2 and 2.0 specification compliant - Copyright © 2008 LG Electronics. All right reserved. 3.