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R Intel® Celeron® Processor in the 478-Pin Package Specification Update October 2006 Notice: The Intel® Celeron® Processor in this Specification Update. Document Number: 290749-030 Current characterized errata are documented in the 478-Pin Package may contain design defects or errors known as errata which may cause the product to deviate from published specifications.
R Intel® Celeron® Processor in the 478-Pin Package Specification Update October 2006 Notice: The Intel® Celeron® Processor in this Specification Update. Document Number: 290749-030 Current characterized errata are documented in the 478-Pin Package may contain design defects or errors known as errata which may cause the product to deviate from published specifications.
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... any features or instructions marked "reserved" or "undefined." Intel, Celeron Pentium, Intel Xeon, and the Intel logo are available on the absence or characteristics of others. Web access will be available for use in the 478-Pin Package Specification Update Copyright © 2003-2005, Intel Corporation 2 Intel® Celeron® Processor in medical, life saving, or life sustaining...
... any features or instructions marked "reserved" or "undefined." Intel, Celeron Pentium, Intel Xeon, and the Intel logo are available on the absence or characteristics of others. Web access will be available for use in the 478-Pin Package Specification Update Copyright © 2003-2005, Intel Corporation 2 Intel® Celeron® Processor in medical, life saving, or life sustaining...
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R Contents Revision History ...4 Preface ...6 Summary Tables of Changes 8 General Information ...14 Component Identification Information 15 Errata...19 Specification Changes ...46 Specification Clarifications 47 Documentation Changes 50 § Intel® Celeron® Processor in the 478-Pin Package Specification Update 3
R Contents Revision History ...4 Preface ...6 Summary Tables of Changes 8 General Information ...14 Component Identification Information 15 Errata...19 Specification Changes ...46 Specification Clarifications 47 Documentation Changes 50 § Intel® Celeron® Processor in the 478-Pin Package Specification Update 3
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...September 2003 November 2003 March 2004 April 2004 June 2004 August 2004 September 2004 October 2004 November 2004 4 Intel® Celeron® Processor in the 478-Pin Package. Added Documentation Changes AC3- Added Documentation Changes AC25- Added Spec Change V1. Updated processor ...Description Initial release. Added erratum AC39. Updated processor identification information table. Added Errata AC56 and AC57. Updated with Intel® Celeron® Processor on 0.13 Micron Process and in the 478-Pin Package Specification Update Updated Erratum AC11 & added Erratum AC58.
...September 2003 November 2003 March 2004 April 2004 June 2004 August 2004 September 2004 October 2004 November 2004 4 Intel® Celeron® Processor in the 478-Pin Package. Added Documentation Changes AC3- Added Documentation Changes AC25- Added Spec Change V1. Updated processor ...Description Initial release. Added erratum AC39. Updated processor identification information table. Added Errata AC56 and AC57. Updated with Intel® Celeron® Processor on 0.13 Micron Process and in the 478-Pin Package Specification Update Updated Erratum AC11 & added Erratum AC58.
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... table of the Software Developer Manuals. Date December 2004 April 2005 October 2005 January 2006 March 2006 April 2006 June 2006 October 2006 Intel® Celeron® Processor in the 478-Pin Package Specification Update 5 Updated Links. Revision History R Version -023 -024 -025 -026 -027 -028 -029 -030 Added Erratum AC65 Description •...
... table of the Software Developer Manuals. Date December 2004 April 2005 October 2005 January 2006 March 2006 April 2006 June 2006 October 2006 Intel® Celeron® Processor in the 478-Pin Package Specification Update 5 Updated Links. Revision History R Version -023 -024 -025 -026 -027 -028 -029 -030 Added Erratum AC65 Description •...
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..., and is an update to 1.80 GHz Datasheet Intel® Celeron® Processor on 0.13 Micron Process in the 478-Pin Package Document Number http://developer.intel.com/design/ celeron/datashts/251748.htm http://developer.intel.com/support /processors/celeron/478/ Related Documents Document Title Intel® 64 and IA-32 Intel® Architectures Software Developer's Manual, Volume 1: Basic Architecture...
..., and is an update to 1.80 GHz Datasheet Intel® Celeron® Processor on 0.13 Micron Process in the 478-Pin Package Document Number http://developer.intel.com/design/ celeron/datashts/251748.htm http://developer.intel.com/support /processors/celeron/478/ Related Documents Document Title Intel® 64 and IA-32 Intel® Architectures Software Developer's Manual, Volume 1: Basic Architecture...
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Care should be taken to deviate from the current published specifications. Intel® Celeron® Processor in the 478-pn package behavior to read all notes associated with any given stepping must assume that stepping are...release of the specifications. Documentation Changes include typos, errors, or omissions from published specifications. Errata may cause the Intel® Celeron® processor in the 478-Pin Package Specification Update 7 Specification Clarifications describe a specification in the processor identification information table. Hardware and software ...
Care should be taken to deviate from the current published specifications. Intel® Celeron® Processor in the 478-pn package behavior to read all notes associated with any given stepping must assume that stepping are...release of the specifications. Documentation Changes include typos, errors, or omissions from published specifications. Errata may cause the Intel® Celeron® processor in the 478-Pin Package Specification Update 7 Specification Clarifications describe a specification in the processor identification information table. Hardware and software ...
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..., or Documentation Changes that will be fixed in a future stepping of the document. 8 Intel® Celeron® Processor in the 478-pin package substrate APIC related erratum. This erratum has been previously fixed. There are no plans...: Document change does not apply to fix some of the errata in a future stepping of the product. Intel intends to listed stepping. This erratum may be implemented. This column refers to account for the other outstanding ... previous version of the component, and to errata on the Celeron processor in the 478-Pin Package Specification Update
..., or Documentation Changes that will be fixed in a future stepping of the document. 8 Intel® Celeron® Processor in the 478-pin package substrate APIC related erratum. This erratum has been previously fixed. There are no plans...: Document change does not apply to fix some of the errata in a future stepping of the product. Intel intends to listed stepping. This erratum may be implemented. This column refers to account for the other outstanding ... previous version of the component, and to errata on the Celeron processor in the 478-Pin Package Specification Update
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... R Note: Each Specification Update item is not held asserted Intel® Celeron® Processor in the 478-Pin Package Specification Update 9 nm process technology R = Intel® Pentium® 4 processor on 90 nm process S = 64-bit Intel® Xeon™ processor with 800 MHz system bus (1...X X AC2 X X X NoFix I/O restart in 478 Pin Package AD = Intel® Celeron® D processor on 65nm process AE = Intel® CoreTM Duo Processor and Intel® CoreTM Solo processor on 65 nm process AC = Intel® Celeron® processor in SMM may fail after simultaneous machine check...
... R Note: Each Specification Update item is not held asserted Intel® Celeron® Processor in the 478-Pin Package Specification Update 9 nm process technology R = Intel® Pentium® 4 processor on 90 nm process S = 64-bit Intel® Xeon™ processor with 800 MHz system bus (1...X X AC2 X X X NoFix I/O restart in 478 Pin Package AD = Intel® Celeron® D processor on 65nm process AE = Intel® CoreTM Duo Processor and Intel® CoreTM Solo processor on 65 nm process AC = Intel® Celeron® processor in SMM may fail after simultaneous machine check...
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... are in Write Combining (WC) memory space PlanFix Buffer on resistance may exceed specification X NoFix Processor issues inconsistent transaction size attributes for locked operation 10 Intel® Celeron® Processor in the 478-Pin Package Specification Update
... are in Write Combining (WC) memory space PlanFix Buffer on resistance may exceed specification X NoFix Processor issues inconsistent transaction size attributes for locked operation 10 Intel® Celeron® Processor in the 478-Pin Package Specification Update
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... be Incorrect Changes to CR3 Register do not Fence Pending Instruction Page Walks Processor Provides a 4-Byte Store Unlock After an 8-Byte Load Lock Intel® Celeron® Processor in the 478-Pin Package Specification Update 11 E0 nC1 nD1 AC28 X AC29 X AC30 X X X AC31 X X X AC32 X X X AC33 X AC34 X X X AC35 X AC36 X AC37 X X X AC38 S X X X AC39 X AC40 X X X AC41...
... be Incorrect Changes to CR3 Register do not Fence Pending Instruction Page Walks Processor Provides a 4-Byte Store Unlock After an 8-Byte Load Lock Intel® Celeron® Processor in the 478-Pin Package Specification Update 11 E0 nC1 nD1 AC28 X AC29 X AC30 X X X AC31 X X X AC32 X X X AC33 X AC34 X X X AC35 X AC36 X AC37 X X X AC38 S X X X AC39 X AC40 X X X AC41...
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...to Pagewalks for X No Fix Subsequent Loads Without Serializing or Invalidating the Page Table Entry X PlanFix A Timing Marginality in the 478-Pin Package Specification Update Summary Tables of Instruction X PlanFix BTS(Branch Trace Store) and PEBS(Precise Event Based Sampling) May ... Writing Shared Unaligned Data that Crosses a Cache Line X NoFix without Proper Semaphores or Barriers May Expose a Memory Ordering Issue 12 Intel® Celeron® Processor in the Arithmetic Logic Unit (ALU) May Cause Indeterminate Behavior With TF (Trap Flag) Asserted, FP Instruction That ...
...to Pagewalks for X No Fix Subsequent Loads Without Serializing or Invalidating the Page Table Entry X PlanFix A Timing Marginality in the 478-Pin Package Specification Update Summary Tables of Instruction X PlanFix BTS(Branch Trace Store) and PEBS(Precise Event Based Sampling) May ... Writing Shared Unaligned Data that Crosses a Cache Line X NoFix without Proper Semaphores or Barriers May Expose a Memory Ordering Issue 12 Intel® Celeron® Processor in the Arithmetic Logic Unit (ALU) May Cause Indeterminate Behavior With TF (Trap Flag) Asserted, FP Instruction That ...
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E0 nC1 nD1 SPECIFICATION CHANGES No update for this Month NO. E0 nC1 nD1 SPECIFICATION CLARIFICATIONS No Update for this month. E0 nC1 nD1 Plans ERRATA AC69 X X X NoFix Debug Status Register (DR6) Breakpoint Condition Detected Flags May be set Incorrectly NO. NO. E0 nC1 nD1 DOCUMENTATION CHANGES Refer to Documentation Changes section § Intel® Celeron® Processor in the 478-Pin Package Specification Update 13 Summary Tables of Changes R NO.
E0 nC1 nD1 SPECIFICATION CHANGES No update for this Month NO. E0 nC1 nD1 SPECIFICATION CLARIFICATIONS No Update for this month. E0 nC1 nD1 Plans ERRATA AC69 X X X NoFix Debug Status Register (DR6) Breakpoint Condition Detected Flags May be set Incorrectly NO. NO. E0 nC1 nD1 DOCUMENTATION CHANGES Refer to Documentation Changes section § Intel® Celeron® Processor in the 478-Pin Package Specification Update 13 Summary Tables of Changes R NO.
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Figure 1. ATPO LOT N NNNN § Frequency/Cache/Bus 14 Intel® Celeron® Processor in the 478-Pin Package S-Spec/Country of Assy FPO -- 2-D Matrix Mark i m © '03 2ACeGleHrZo/n5®12/400/1.50V S2YGYHYZY/1X2X8X/4X0X0X FSFYFYFYFYFFXFX-XNXNXNXN iFFmFF©FF'0F1F - Example Markings for the Intel® Celeron® processor in the 478-pn package. General Information R General Information This section contains top marking information for the Intel® Celeron® Processor on 0.13 Micron Process and/or in the 478-Pin Package Specification Update
Figure 1. ATPO LOT N NNNN § Frequency/Cache/Bus 14 Intel® Celeron® Processor in the 478-Pin Package S-Spec/Country of Assy FPO -- 2-D Matrix Mark i m © '03 2ACeGleHrZo/n5®12/400/1.50V S2YGYHYZY/1X2X8X/4X0X0X FSFYFYFYFYFFXFX-XNXNXNXN iFFmFF©FF'0F1F - Example Markings for the Intel® Celeron® processor in the 478-pn package. General Information R General Information This section contains top marking information for the Intel® Celeron® Processor on 0.13 Micron Process and/or in the 478-Pin Package Specification Update
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... CPUID instruction is executed with a 1 in the EAX register, and the generation field of the Device ID register accessible through Boundary Scan. 3. Intel® Celeron® Processor in the 478-Pin Package Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Speed Core/Bus Package and Revision SL69Z E0 SL68C...
... CPUID instruction is executed with a 1 in the EAX register, and the generation field of the Device ID register accessible through Boundary Scan. 3. Intel® Celeron® Processor in the 478-Pin Package Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Speed Core/Bus Package and Revision SL69Z E0 SL68C...
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Component Identification Information R Table 1. Intel® Celeron® Processor in the 478-Pin Package Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Speed Core/Bus Package and Revision SL6RV C1 SL6VR D1 SL6VY ....0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 Notes 4, 8, 9 4, 8, 9 2, 4, 8 2, 5 5, 8, 10 5, 8, 9 2, 5, 8 2, 5, 8 2, 5, 8 2, 6 6, 8 6, 8, 9 2, 6, 8 6, 8, 9 16 Intel® Celeron® Processor in the 478-Pin Package Specification Update
Component Identification Information R Table 1. Intel® Celeron® Processor in the 478-Pin Package Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Speed Core/Bus Package and Revision SL6RV C1 SL6VR D1 SL6VY ....0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 Notes 4, 8, 9 4, 8, 9 2, 4, 8 2, 5 5, 8, 10 5, 8, 9 2, 5, 8 2, 5, 8 2, 5, 8 2, 6 6, 8 6, 8, 9 2, 6, 8 6, 8, 9 16 Intel® Celeron® Processor in the 478-Pin Package Specification Update
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... Intel® Celeron® Processor in the 478-Pin Package Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Speed Core/Bus Package and Revision SL6W2 D1 SL6XJ C1 SL6WC D1 SL6WD D1 SL6T2 C1 SL6T5 C1 SL6VU C1 SL6W4 D1 SL6XG C1 SL6V2 C1 SL6VU ... mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 Notes 2, 6, 8 6, 8 6, 8, 9 2, 6, 8 2, 6 2, 6, 8 7, 8 2, 7, 8 7, 8, 9 7, 8 7, 8 8 2, 8, 11 2, 8, 11 Intel® Celeron® Processor in the 478-Pin Package Specification Update 17
... Intel® Celeron® Processor in the 478-Pin Package Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Speed Core/Bus Package and Revision SL6W2 D1 SL6XJ C1 SL6WC D1 SL6WD D1 SL6T2 C1 SL6T5 C1 SL6VU C1 SL6W4 D1 SL6XG C1 SL6V2 C1 SL6VU ... mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 Notes 2, 6, 8 6, 8 6, 8, 9 2, 6, 8 2, 6 2, 6, 8 7, 8 2, 7, 8 7, 8, 9 7, 8 7, 8 8 2, 8, 11 2, 8, 11 Intel® Celeron® Processor in the 478-Pin Package Specification Update 17
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... has maximum Tcase of 70 °C 7. This processor has maximum Tcase of 72 °C § Notes 8, 11 2, 8 8 8, 9 2, 8 2,8 2,8 18 Intel® Celeron® Processor in the 478-Pin Package Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Speed Core/Bus Package and Revision SL6VV C1 SL77U... 0F29h 0F29h 0F29h 2.60 GHz/ 400 MHz 2.70 GHz/ 400 MHz 2.70 GHz/ 400 MHz 2.80 GHz/ 400 MHz 2.80 GHz/ 400 MHz 1.60GHz/400MHz 1.80GHz/400MHz FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev ...
... has maximum Tcase of 70 °C 7. This processor has maximum Tcase of 72 °C § Notes 8, 11 2, 8 8 8, 9 2, 8 2,8 2,8 18 Intel® Celeron® Processor in the 478-Pin Package Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Speed Core/Bus Package and Revision SL6VV C1 SL77U... 0F29h 0F29h 0F29h 2.60 GHz/ 400 MHz 2.70 GHz/ 400 MHz 2.70 GHz/ 400 MHz 2.80 GHz/ 400 MHz 2.80 GHz/ 400 MHz 1.60GHz/400MHz 1.80GHz/400MHz FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev ...
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... information in the possibility that is no MCE pending, the SMM handler may also receive an assertion of Changes. I/O Restart in the 478-Pin Package Specification Update 19 If there is check for one of Changes. Status: For the steppings affected, see the Summary Tables of... the I /O instruction, but may not clear these registers. Intel® Celeron® Processor in SMM May Fail after Simultaneous Machine Check Exception (MCE) Problem: If an I/O instruction (IN, INS, REP INS, OUT,...
... information in the possibility that is no MCE pending, the SMM handler may also receive an assertion of Changes. I/O Restart in the 478-Pin Package Specification Update 19 If there is check for one of Changes. Status: For the steppings affected, see the Summary Tables of... the I /O instruction, but may not clear these registers. Intel® Celeron® Processor in SMM May Fail after Simultaneous Machine Check Exception (MCE) Problem: If an I/O instruction (IN, INS, REP INS, OUT,...
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... the steppings affected, see the Summary Tables of Changes. The invalid opcode 0FFFh did not require a ModRM byte in previous generation Intel® architecture processors, but does in the 478-Pin Package Specification Update Implication: UC or WC code located in Same Line As Write Back (WB) Data May Lead to Data... code. Implication: When this transaction, it should not be retried. Errata R AC3. AC4. Status: For the steppings affected, see the Summary Tables of Changes. 20 Intel® Celeron® Processor in the Intel® Pentium® 4 processor.
... the steppings affected, see the Summary Tables of Changes. The invalid opcode 0FFFh did not require a ModRM byte in previous generation Intel® architecture processors, but does in the 478-Pin Package Specification Update Implication: UC or WC code located in Same Line As Write Back (WB) Data May Lead to Data... code. Implication: When this transaction, it should not be retried. Errata R AC3. AC4. Status: For the steppings affected, see the Summary Tables of Changes. 20 Intel® Celeron® Processor in the Intel® Pentium® 4 processor.