Specification Update
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Current characterized errata are documented in the 478-Pin Package may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Document Number: 290749-030 R Intel® Celeron® Processor in the 478-Pin Package Specification Update October 2006 Notice: The Intel® Celeron® Processor in this Specification Update.
Current characterized errata are documented in the 478-Pin Package may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Document Number: 290749-030 R Intel® Celeron® Processor in the 478-Pin Package Specification Update October 2006 Notice: The Intel® Celeron® Processor in this Specification Update.
Specification Update
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... access will be available for a period of Intel Corporation or its subsidiaries in the 478-Pin Package Specification Update Intel may be publicly available following End of Life (EOL). Intel products are available on the absence or characteristics of others. Copyright © 2003-2005, Intel Corporation 2 Intel® Celeron® Processor in the United States and other...
... access will be available for a period of Intel Corporation or its subsidiaries in the 478-Pin Package Specification Update Intel may be publicly available following End of Life (EOL). Intel products are available on the absence or characteristics of others. Copyright © 2003-2005, Intel Corporation 2 Intel® Celeron® Processor in the United States and other...
Specification Update
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R Contents Revision History ...4 Preface ...6 Summary Tables of Changes 8 General Information ...14 Component Identification Information 15 Errata...19 Specification Changes ...46 Specification Clarifications 47 Documentation Changes 50 § Intel® Celeron® Processor in the 478-Pin Package Specification Update 3
R Contents Revision History ...4 Preface ...6 Summary Tables of Changes 8 General Information ...14 Component Identification Information 15 Errata...19 Specification Changes ...46 Specification Clarifications 47 Documentation Changes 50 § Intel® Celeron® Processor in the 478-Pin Package Specification Update 3
Specification Update
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...Updated Erratum AC11 & added Erratum AC58. Added erratum AC35. Added Documentation Changes AC3- Updated with Intel® Celeron® Processor on 0.13 Micron Process and in the 478-Pin Package Specification Update Added erratum AC38. AC32. AC10. Updated processor identification information table. Updated...2003 August 2003 September 2003 November 2003 March 2004 April 2004 June 2004 August 2004 September 2004 October 2004 November 2004 4 Intel® Celeron® Processor in the 478-Pin Package. Revision History R Revision History Version -001 -002 -003 -004 -005 -006 -007 -008 -...
...Updated Erratum AC11 & added Erratum AC58. Added erratum AC35. Added Documentation Changes AC3- Updated with Intel® Celeron® Processor on 0.13 Micron Process and in the 478-Pin Package Specification Update Added erratum AC38. AC32. AC10. Updated processor identification information table. Updated...2003 August 2003 September 2003 November 2003 March 2004 April 2004 June 2004 August 2004 September 2004 October 2004 November 2004 4 Intel® Celeron® Processor in the 478-Pin Package. Revision History R Revision History Version -001 -002 -003 -004 -005 -006 -007 -008 -...
Specification Update
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... the Software Developer Manuals. Updated Links. Date December 2004 April 2005 October 2005 January 2006 March 2006 April 2006 June 2006 October 2006 Intel® Celeron® Processor in the 478-Pin Package Specification Update 5 Updated Summary table of Changes. Revision History R Version -023 -024 -025 -026 -027 -028 -029 -030 Added Erratum...
... the Software Developer Manuals. Updated Links. Date December 2004 April 2005 October 2005 January 2006 March 2006 April 2006 June 2006 October 2006 Intel® Celeron® Processor in the 478-Pin Package Specification Update 5 Updated Summary table of Changes. Revision History R Version -023 -024 -025 -026 -027 -028 -029 -030 Added Erratum...
Specification Update
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...GHz Datasheet Intel® Celeron® Processor on 0.13 Micron Process in the 478-Pin Package Document Number http://developer.intel.com/design/ celeron/datashts/251748.htm http://developer.intel.com/support /processors/celeron/478/ Related Documents Document Title Intel® 64 and IA-32 Intel® ... Guide Document Number 253665 253666 253667 253668 253669 6 Intel® Celeron® Processor in the 478-Pin Package Specification Update Affected Documents Document Title Intel® Celeron® Processor in the 478-Pin Package up to the specifications contained in the documents...
...GHz Datasheet Intel® Celeron® Processor on 0.13 Micron Process in the 478-Pin Package Document Number http://developer.intel.com/design/ celeron/datashts/251748.htm http://developer.intel.com/support /processors/celeron/478/ Related Documents Document Title Intel® 64 and IA-32 Intel® ... Guide Document Number 253665 253666 253667 253668 253669 6 Intel® Celeron® Processor in the 478-Pin Package Specification Update Affected Documents Document Title Intel® Celeron® Processor in the 478-Pin Package up to the specifications contained in the documents...
Specification Update
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...are differentiated by their unique characteristics (e.g., core speed, L2 cache size, package type, etc.) as described in the 478-Pin Package Specification Update 7 Intel® Celeron® Processor in the processor identification information table. Products are modifications to deviate from the current published specifications. These... situation. These changes will be incorporated in the next release of the specifications. Errata may cause the Intel® Celeron® processor in the next release of the specifications. These clarifications will be incorporated in the...
...are differentiated by their unique characteristics (e.g., core speed, L2 cache size, package type, etc.) as described in the 478-Pin Package Specification Update 7 Intel® Celeron® Processor in the processor identification information table. Products are modifications to deviate from the current published specifications. These... situation. These changes will be incorporated in the next release of the specifications. Errata may cause the Intel® Celeron® processor in the next release of the specifications. These clarifications will be incorporated in the...
Specification Update
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...PlanFix: Fixed: NoFix: PKG: AP: Document change does not apply to listed stepping. There are no plans to errata on the Celeron processor in the 478-pin package substrate APIC related erratum. Summary Tables of Changes R Summary Tables of Changes The following notations: Codes Used in Summary Table...Box): This erratum is either new or modified from the previous version of the document. 8 Intel® Celeron® Processor in a future stepping of the component, and to the listed component steppings. Intel intends to fix some of the product. Shaded: This item is fixed in a future ...
...PlanFix: Fixed: NoFix: PKG: AP: Document change does not apply to listed stepping. There are no plans to errata on the Celeron processor in the 478-pin package substrate APIC related erratum. Summary Tables of Changes R Summary Tables of Changes The following notations: Codes Used in Summary Table...Box): This erratum is either new or modified from the previous version of the document. 8 Intel® Celeron® Processor in a future stepping of the component, and to the listed component steppings. Intel intends to fix some of the product. Shaded: This item is fixed in a future ...
Specification Update
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...™ processor MP with a capital letter to distinguish the product. Summary Tables of Changes R Note: Each Specification Update item is not held asserted Intel® Celeron® Processor in the 478-Pin Package Specification Update 9 E0 nC1 nD1 Plans ERRATA AC1 X X AC2 X X X NoFix I/O restart in SMM may fail after simultaneous machine check exception...
...™ processor MP with a capital letter to distinguish the product. Summary Tables of Changes R Note: Each Specification Update item is not held asserted Intel® Celeron® Processor in the 478-Pin Package Specification Update 9 E0 nC1 nD1 Plans ERRATA AC1 X X AC2 X X X NoFix I/O restart in SMM may fail after simultaneous machine check exception...
Specification Update
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... are in Write Combining (WC) memory space PlanFix Buffer on resistance may exceed specification X NoFix Processor issues inconsistent transaction size attributes for locked operation 10 Intel® Celeron® Processor in the 478-Pin Package Specification Update
... are in Write Combining (WC) memory space PlanFix Buffer on resistance may exceed specification X NoFix Processor issues inconsistent transaction size attributes for locked operation 10 Intel® Celeron® Processor in the 478-Pin Package Specification Update
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... NoFix Fixed Fixed Multiple accesses to CR3 Register do not Fence Pending Instruction Page Walks Processor Provides a 4-Byte Store Unlock After an 8-Byte Load Lock Intel® Celeron® Processor in EAX register after reset NoFix NoFix NoFix The State of Changes R NO. Summary Tables of the Resume Flag (RF Flag) in... CR2 may be incorrect or an incorrect page fault error code may cause IO and Special Cycle failure Fixed Erroneous BIST result found in the 478-Pin Package Specification Update 11
... NoFix Fixed Fixed Multiple accesses to CR3 Register do not Fence Pending Instruction Page Walks Processor Provides a 4-Byte Store Unlock After an 8-Byte Load Lock Intel® Celeron® Processor in EAX register after reset NoFix NoFix NoFix The State of Changes R NO. Summary Tables of the Resume Flag (RF Flag) in... CR2 may be incorrect or an incorrect page fault error code may cause IO and Special Cycle failure Fixed Erroneous BIST result found in the 478-Pin Package Specification Update 11
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... Address Translations Writing Shared Unaligned Data that Crosses a Cache Line X NoFix without Proper Semaphores or Barriers May Expose a Memory Ordering Issue 12 Intel® Celeron® Processor in the 478-Pin Package Specification Update Summary Tables of Instruction X PlanFix BTS(Branch Trace Store) and PEBS(Precise Event Based Sampling) May Update Memory outside...
... Address Translations Writing Shared Unaligned Data that Crosses a Cache Line X NoFix without Proper Semaphores or Barriers May Expose a Memory Ordering Issue 12 Intel® Celeron® Processor in the 478-Pin Package Specification Update Summary Tables of Instruction X PlanFix BTS(Branch Trace Store) and PEBS(Precise Event Based Sampling) May Update Memory outside...
Specification Update
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E0 nC1 nD1 SPECIFICATION CLARIFICATIONS No Update for this month. E0 nC1 nD1 DOCUMENTATION CHANGES Refer to Documentation Changes section § Intel® Celeron® Processor in the 478-Pin Package Specification Update 13 NO. E0 nC1 nD1 SPECIFICATION CHANGES No update for this Month NO. Summary Tables of Changes R NO. E0 nC1 nD1 Plans ERRATA AC69 X X X NoFix Debug Status Register (DR6) Breakpoint Condition Detected Flags May be set Incorrectly NO.
E0 nC1 nD1 SPECIFICATION CLARIFICATIONS No Update for this month. E0 nC1 nD1 DOCUMENTATION CHANGES Refer to Documentation Changes section § Intel® Celeron® Processor in the 478-Pin Package Specification Update 13 NO. E0 nC1 nD1 SPECIFICATION CHANGES No update for this Month NO. Summary Tables of Changes R NO. E0 nC1 nD1 Plans ERRATA AC69 X X X NoFix Debug Status Register (DR6) Breakpoint Condition Detected Flags May be set Incorrectly NO.
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General Information R General Information This section contains top marking information for the Intel® Celeron® Processor on 0.13 Micron Process and/or in the 478-Pin Package S-Spec/Country of Assy FPO -- 2-D Matrix Mark i m © '03 2ACeGleHrZo/n5®12/400/1.50V S2YGYHYZY/1X2X8X/4X0X0X FSFYFYFYFYFFXFX-XNXNXNXN iFFmFF©FF'0F1F - ATPO LOT N NNNN § Frequency/Cache/Bus 14 Intel® Celeron® Processor in the 478-pn package. Example Markings for the Intel® Celeron® processor in the 478-Pin Package Specification Update Figure 1.
General Information R General Information This section contains top marking information for the Intel® Celeron® Processor on 0.13 Micron Process and/or in the 478-Pin Package S-Spec/Country of Assy FPO -- 2-D Matrix Mark i m © '03 2ACeGleHrZo/n5®12/400/1.50V S2YGYHYZY/1X2X8X/4X0X0X FSFYFYFYFYFFXFX-XNXNXNXN iFFmFF©FF'0F1F - ATPO LOT N NNNN § Frequency/Cache/Bus 14 Intel® Celeron® Processor in the 478-pn package. Example Markings for the Intel® Celeron® processor in the 478-Pin Package Specification Update Figure 1.
Specification Update
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... after the CPUID instruction is executed with a 1 in the EAX register. Component Identification Information R Component Identification Information The Intel® Celeron® processor in the EAX register, and the generation field of the Device ID register accessible through Boundary Scan. 3. Table... EDX register after the CPUID instruction is executed with a 1 in the 478-pn package processor may be identified by the following values. Intel® Celeron® Processor in the 478-Pin Package Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes)...
... after the CPUID instruction is executed with a 1 in the EAX register. Component Identification Information R Component Identification Information The Intel® Celeron® processor in the EAX register, and the generation field of the Device ID register accessible through Boundary Scan. 3. Table... EDX register after the CPUID instruction is executed with a 1 in the 478-pn package processor may be identified by the following values. Intel® Celeron® Processor in the 478-Pin Package Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes)...
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Intel® Celeron® Processor in the 478-Pin Package Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Speed Core/Bus Package and Revision SL6RV C1 SL6VR D1 SL6VY ....0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 Notes 4, 8, 9 4, 8, 9 2, 4, 8 2, 5 5, 8, 10 5, 8, 9 2, 5, 8 2, 5, 8 2, 5, 8 2, 6 6, 8 6, 8, 9 2, 6, 8 6, 8, 9 16 Intel® Celeron® Processor in the 478-Pin Package Specification Update Component Identification Information R Table 1.
Intel® Celeron® Processor in the 478-Pin Package Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Speed Core/Bus Package and Revision SL6RV C1 SL6VR D1 SL6VY ....0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 Notes 4, 8, 9 4, 8, 9 2, 4, 8 2, 5 5, 8, 10 5, 8, 9 2, 5, 8 2, 5, 8 2, 5, 8 2, 6 6, 8 6, 8, 9 2, 6, 8 6, 8, 9 16 Intel® Celeron® Processor in the 478-Pin Package Specification Update Component Identification Information R Table 1.
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...Intel® Celeron® Processor in the 478-Pin Package Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Speed Core/Bus Package and Revision SL6W2 D1 SL6XJ C1 SL6WC D1 SL6WD D1 SL6T2 C1 SL6T5 C1 SL6VU C1 SL6W4 D1 SL6XG C1 SL6V2 C1 SL6VU...PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 Notes 2, 6, 8 6, 8 6, 8, 9 2, 6, 8 2, 6 2, 6, 8 7, 8 2, 7, 8 7, 8, 9 7, 8 7, 8 8 2, 8, 11 2, 8, 11 Intel® Celeron® Processor in the 478-Pin Package Specification Update 17 Component Identification Information R Table 1.
...Intel® Celeron® Processor in the 478-Pin Package Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Speed Core/Bus Package and Revision SL6W2 D1 SL6XJ C1 SL6WC D1 SL6WD D1 SL6T2 C1 SL6T5 C1 SL6VU C1 SL6W4 D1 SL6XG C1 SL6V2 C1 SL6VU...PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 Notes 2, 6, 8 6, 8 6, 8, 9 2, 6, 8 2, 6 2, 6, 8 7, 8 2, 7, 8 7, 8, 9 7, 8 7, 8 8 2, 8, 11 2, 8, 11 Intel® Celeron® Processor in the 478-Pin Package Specification Update 17 Component Identification Information R Table 1.
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... has maximum Tcase of 69 °C 6. This processor has maximum Tcase of 72 °C § Notes 8, 11 2, 8 8 8, 9 2, 8 2,8 2,8 18 Intel® Celeron® Processor in the 478-Pin Package Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Speed Core/Bus Package and Revision SL6VV C1 SL77U... 0F29h 0F29h 0F29h 2.60 GHz/ 400 MHz 2.70 GHz/ 400 MHz 2.70 GHz/ 400 MHz 2.80 GHz/ 400 MHz 2.80 GHz/ 400 MHz 1.60GHz/400MHz 1.80GHz/400MHz FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev ...
... has maximum Tcase of 69 °C 6. This processor has maximum Tcase of 72 °C § Notes 8, 11 2, 8 8 8, 9 2, 8 2,8 2,8 18 Intel® Celeron® Processor in the 478-Pin Package Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Speed Core/Bus Package and Revision SL6VV C1 SL77U... 0F29h 0F29h 0F29h 2.60 GHz/ 400 MHz 2.70 GHz/ 400 MHz 2.70 GHz/ 400 MHz 2.80 GHz/ 400 MHz 2.80 GHz/ 400 MHz 1.60GHz/400MHz 1.80GHz/400MHz FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev 1.0 FC-PGA2 31.0 mm , rev ...
Specification Update
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... data for one of the processor. Implication: When this instruction becomes corrupted, the processor will remain pending. Intel® Celeron® Processor in the MCA registers may occur for this erratum occurs, the information in the 478-Pin Package Specification Update 19 Errata R Errata AC1. If the instruction is directed at a device that...
... data for one of the processor. Implication: When this instruction becomes corrupted, the processor will remain pending. Intel® Celeron® Processor in the MCA registers may occur for this erratum occurs, the information in the 478-Pin Package Specification Update 19 Errata R Errata AC1. If the instruction is directed at a device that...
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...by this implicit writeback may lead to the way the processor handles self-modifying code. Implication: UC or WC code located in the 478-Pin Package Specification Update Implication: The use of Changes. Workaround: UC or WC code should be corrupted due to data corruption. AC5...0FFFh opcode. Workaround: Use a ModRM byte with WB data Status: For the steppings affected, see the Summary Tables of Changes. 20 Intel® Celeron® Processor in the same cache line as WB data may be retried and the locked sequence restarted. Transaction Is Not Retried after ...
...by this implicit writeback may lead to the way the processor handles self-modifying code. Implication: UC or WC code located in the 478-Pin Package Specification Update Implication: The use of Changes. Workaround: UC or WC code should be corrupted due to data corruption. AC5...0FFFh opcode. Workaround: Use a ModRM byte with WB data Status: For the steppings affected, see the Summary Tables of Changes. 20 Intel® Celeron® Processor in the same cache line as WB data may be retried and the locked sequence restarted. Transaction Is Not Retried after ...