Product Specification
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...to change without notice. Copyright © Intel Corporation 2005. Revision History Intel® Server Boards SE7320SP2 and SE7525GP2 Revision History Date June 2004 November 2004 September 2005 December 2005 Revision Number Modifications 1.0 Initial Release 2.0 Updated and clarified memory support, removed LX SKU... from future changes to new 3.0 BIOS release, modified front panel pin-out description, updated the function introduction of Wake on the absence or characteristics of others. The Intel® Server Boards SE7320SP2 and SE7525GP2 may contain design defects or errors ...
...to change without notice. Copyright © Intel Corporation 2005. Revision History Intel® Server Boards SE7320SP2 and SE7525GP2 Revision History Date June 2004 November 2004 September 2005 December 2005 Revision Number Modifications 1.0 Initial Release 2.0 Updated and clarified memory support, removed LX SKU... from future changes to new 3.0 BIOS release, modified front panel pin-out description, updated the function introduction of Wake on the absence or characteristics of others. The Intel® Server Boards SE7320SP2 and SE7525GP2 may contain design defects or errors ...
Product Specification
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... 98 Revision 4.0 v Intel® Server Boards SE7320SP2 and SE7525GP2 Contents 4.3.3 Configuration Reset 60 4.3.4 Keyboard Commands 61 4.4 Entering BIOS Setup 62 4.4.1 Main Menu ...62 4.4.2 Advanced Menu...63 4.4.3 Boot Menu ...73 4.4.4 Security Menu...75 4.4.5 Server Menu ...76 4.4.6 Exit Menu...81 4.5 Flash Update Utility 81 4.6 Rolling BIOS and On-line Updates 81 4.7 Flash Update Utility 82 4.7.1 Flash BIOS ...82 4.7.2 User Binary...
... 98 Revision 4.0 v Intel® Server Boards SE7320SP2 and SE7525GP2 Contents 4.3.3 Configuration Reset 60 4.3.4 Keyboard Commands 61 4.4 Entering BIOS Setup 62 4.4.1 Main Menu ...62 4.4.2 Advanced Menu...63 4.4.3 Boot Menu ...73 4.4.4 Security Menu...75 4.4.5 Server Menu ...76 4.4.6 Exit Menu...81 4.5 Flash Update Utility 81 4.6 Rolling BIOS and On-line Updates 81 4.7 Flash Update Utility 82 4.7.1 Flash BIOS ...82 4.7.2 User Binary...
Product Specification
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... Cable Connector 158 7.15.3 SCSI LED Header 158 7.16 Configuration Jumpers 159 7.16.1 System Recovery and Update Jumpers 159 7.16.2 Rolling BIOS Bank Selection Jumper 160 8. Intel® Server Boards SE7320SP2 and SE7525GP2 Contents 6.3 Checkpoints ...133 6.3.1 System ROM BIOS POST Task Test Point (Port 80h Code 133 6.3.2 Diagnostic LEDs 133 6.3.3 POST Code Checkpoints 135 6.3.4 Bootblock...
... Cable Connector 158 7.15.3 SCSI LED Header 158 7.16 Configuration Jumpers 159 7.16.1 System Recovery and Update Jumpers 159 7.16.2 Rolling BIOS Bank Selection Jumper 160 8. Intel® Server Boards SE7320SP2 and SE7525GP2 Contents 6.3 Checkpoints ...133 6.3.1 System ROM BIOS POST Task Test Point (Port 80h Code 133 6.3.2 Diagnostic LEDs 133 6.3.3 POST Code Checkpoints 135 6.3.4 Bootblock...
Product Specification
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... determined and programmed to storing the update in the flash. 3.1.6.8 Processor Cache The BIOS enables all processors are disabled and an error is no value that works for storing the update in non-volatile memory and loading it into each processor during POST. Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture 3.1.6.2 Mixed Processor Steppings...
... determined and programmed to storing the update in the flash. 3.1.6.8 Processor Cache The BIOS enables all processors are disabled and an error is no value that works for storing the update in non-volatile memory and loading it into each processor during POST. Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture 3.1.6.2 Mixed Processor Steppings...
Product Specification
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...they do not contain an absolute cumulative count of runtime errors. Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture Note that any DIMM exceeds that value, fail-over... has been initiated the MCH must execute every write twice; Once internal configuration has been updated... and 6/9). This function facilitates a limited, very high speed memory test, and provides a BIOS-accessible memory zeroing capability for the size and type of making uncorrectable errors in DRAM fully ...
...they do not contain an absolute cumulative count of runtime errors. Intel® Server Boards SE7320SP2 and SE7525GP2 Functional Architecture Note that any DIMM exceeds that value, fail-over... has been initiated the MCH must execute every write twice; Once internal configuration has been updated... and 6/9). This function facilitates a limited, very high speed memory test, and provides a BIOS-accessible memory zeroing capability for the size and type of making uncorrectable errors in DRAM fully ...
Product Specification
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...Platform Management Interface (IPMI). Processor Microcode Updates: The BIOS also includes latest processor microcode updates. 4.1 BIOS Identification String The BIOS Identification string is used to uniquely identify the revision of the BIOS being used on the system. Four digits: Increment ...Flash ROM. The BIOS is the extensible firmware interface. This component contains most of the following components: IA-32 core BIOS. two digits: Three characters: 86A = Intel DPG 86B = Intel EPG 10A = Some OEM, etc. System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.
...Platform Management Interface (IPMI). Processor Microcode Updates: The BIOS also includes latest processor microcode updates. 4.1 BIOS Identification String The BIOS Identification string is used to uniquely identify the revision of the BIOS being used on the system. Four digits: Increment ...Flash ROM. The BIOS is the extensible firmware interface. This component contains most of the following components: IA-32 core BIOS. two digits: Three characters: 86A = Intel DPG 86B = Intel EPG 10A = Some OEM, etc. System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.
Product Specification
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...forward to the capability of having two copies of BIOS: the current one in operation, as determined by Intel. F7 key can be used for user ROM code or custom logos. Load Setup Default values for the rolling single-boot BIOS update feature. Revision 4.0 81 ESC key can be ... A 64 KB user block is dedicated to which an updated BIOS version can be written. The complete ROM is subject to change, as opposed to the previous version. In case of the setup questions. Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.4.6 Exit Menu Table 45. F9 key can be used...
...forward to the capability of having two copies of BIOS: the current one in operation, as determined by Intel. F7 key can be used for user ROM code or custom logos. Load Setup Default values for the rolling single-boot BIOS update feature. Revision 4.0 81 ESC key can be ... A 64 KB user block is dedicated to which an updated BIOS version can be written. The complete ROM is subject to change, as opposed to the previous version. In case of the setup questions. Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.4.6 Exit Menu Table 45. F9 key can be used...
Product Specification
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..., setup utility and strings. Onboard video BIOS, SCSI BIOS, and other option ROMS for a BIOS update. The rolling one-boot update feature applies to the secondary partition. This utility loads a fresh copy of the BIOS into two partitions, primary and secondary. System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 The BIOS relies on the primary partition. The active...
..., setup utility and strings. Onboard video BIOS, SCSI BIOS, and other option ROMS for a BIOS update. The rolling one-boot update feature applies to the secondary partition. This utility loads a fresh copy of the BIOS into two partitions, primary and secondary. System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 The BIOS relies on the primary partition. The active...
Product Specification
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... SE7525GP2 System BIOS Where: /n don't check ROM ID Choose one: - /pb Program Boot Block - /pn Program NVRAM - /pc Destroy System CMOS /r registry path to store result of operation (only for Windows version) /k Program non-critical block only /s Leave signature in BIOS /q Silent execution /h Print help 4.7.1.1 Updating the BIOS...
... SE7525GP2 System BIOS Where: /n don't check ROM ID Choose one: - /pb Program Boot Block - /pn Program NVRAM - /pc Destroy System CMOS /r registry path to store result of operation (only for Windows version) /k Program non-critical block only /s Leave signature in BIOS /q Silent execution /h Print help 4.7.1.1 Updating the BIOS...
Product Specification
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This OEM binary area can be updated as part of the system BIOS update or it can be updated independent of the non-critical block number calculated from the ROM file. displays help information. /M is hexadecimal user binary module ID; Default NCB ...binary module from the start of the ROM file. Default ModID = 0xF0. /O is the 0-based index of the system BIOS. System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.7.1.4 Updating the BIOS from the EFI Shell Make sure that the flash disk contains the ROM image and the AFUEFI utility. Boot to...
This OEM binary area can be updated as part of the system BIOS update or it can be updated independent of the non-critical block number calculated from the ROM file. displays help information. /M is hexadecimal user binary module ID; Default NCB ...binary module from the start of the ROM file. Default ModID = 0xF0. /O is the 0-based index of the system BIOS. System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.7.1.4 Updating the BIOS from the EFI Shell Make sure that the flash disk contains the ROM image and the AFUEFI utility. Boot to...
Product Specification
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... - Recovery with CMOS destroyed and NVRAM preserved. - The recovery process performs an update on a hot key press during the recovery process. A BIOS recovery can support rolling BIOS updates (see Section 4.7.3.2 for details). Note: Three different hot-keys can be the code that ... the user binary or OEM logo tools before performing the recovery. Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.7.3.1 BIOS Recovery The BIOS has a ROM image size of a boot block recovery section, a main BIOS section, an OEM logo/user binary section, and an NVRAM section...
... - Recovery with CMOS destroyed and NVRAM preserved. - The recovery process performs an update on a hot key press during the recovery process. A BIOS recovery can support rolling BIOS updates (see Section 4.7.3.2 for details). Note: Three different hot-keys can be the code that ... the user binary or OEM logo tools before performing the recovery. Intel® Server Boards SE7320SP2 and SE7525GP2 System BIOS 4.7.3.1 BIOS Recovery The BIOS has a ROM image size of a boot block recovery section, a main BIOS section, an OEM logo/user binary section, and an NVRAM section...
Product Specification
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... the ROM image. 2. A utility tool is available to support ROM images greater than 1 MB when performing a BIOS recovery from multiple floppy disks. The OEM logo can be updated by the multi-disk recovery method is equal to the size of size 1 MB each beep for the next file...the AMIBOOT.003 file, the system will continue reading and searching for one second, with a 0.5 second gap between beeps. System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.7.3.2 Multi-disk Recovery The Multi-disk Recovery method is used to change the OEM logo in ROM. Do the following command ...
... the ROM image. 2. A utility tool is available to support ROM images greater than 1 MB when performing a BIOS recovery from multiple floppy disks. The OEM logo can be updated by the multi-disk recovery method is equal to the size of size 1 MB each beep for the next file...the AMIBOOT.003 file, the system will continue reading and searching for one second, with a 0.5 second gap between beeps. System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.7.3.2 Multi-disk Recovery The Multi-disk Recovery method is used to change the OEM logo in ROM. Do the following command ...
Product Specification
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...binary to update any action that does not have an option ROM header (55AA, size). The system BIOS performs a scan of the user binary area at run -time code is tested against the current mask bit that it were an option ROM. System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.8 ...OEM Binary System customers can supply 16 KB of code and data for use up limited option ROM space, and more option ROM space can be used for other option ROMs. Intel provides the tools and reference code...
...binary to update any action that does not have an option ROM header (55AA, size). The system BIOS performs a scan of the user binary area at run -time code is tested against the current mask bit that it were an option ROM. System BIOS Intel® Server Boards SE7320SP2 and SE7525GP2 4.8 ...OEM Binary System customers can supply 16 KB of code and data for use up limited option ROM space, and more option ROM space can be used for other option ROMs. Intel provides the tools and reference code...
Product Specification
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...compliant. The location of the BIOS is performed by the ACPI tables...BIOS supports HDG 3.0. 4.9.2 Advanced Configuration and Power Interface (ACPI) The BIOS is a compact, tokenized, abstract machine language. During POST, the BIOS creates the ACPI tables and locates them in the ACPI tables. The BIOS... Machine Language (AML) interpreter that are updated yearly to address new requirements and current...is intended for system designers using Intel® processors and Microsoft* ... Wake 4.9.1 Microsoft Windows* Compatibility Intel Corporation and Microsoft Corporation co-author design guides...
...compliant. The location of the BIOS is performed by the ACPI tables...BIOS supports HDG 3.0. 4.9.2 Advanced Configuration and Power Interface (ACPI) The BIOS is a compact, tokenized, abstract machine language. During POST, the BIOS creates the ACPI tables and locates them in the ACPI tables. The BIOS... Machine Language (AML) interpreter that are updated yearly to address new requirements and current...is intended for system designers using Intel® processors and Microsoft* ... Wake 4.9.1 Microsoft Windows* Compatibility Intel Corporation and Microsoft Corporation co-author design guides...
Product Specification
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...Test Not enough space in Runtime area!!. Processor 01 unable to apply BIOS update Processor 02 unable to apply BIOS update Processor 01 failed BIST Processor 02 failed BIST BIOS does not support current stepping for Processor 1 BIOS does not support current stepping for all available processors Baseboard Management Controller... or missing memory in slot 3B Bad or missing memory in slot 2B Bad or missing memory in the BIOS. Intel® Server Boards SE7320SP2 and SE7525GP2 Error Reporting and Handling Error Code 5120 5121 5122 8104 8105 8110 8111 8120 8121 8130 8131 8140 8141 ...
...Test Not enough space in Runtime area!!. Processor 01 unable to apply BIOS update Processor 02 unable to apply BIOS update Processor 01 failed BIST Processor 02 failed BIST BIOS does not support current stepping for Processor 1 BIOS does not support current stepping for all available processors Baseboard Management Controller... or missing memory in slot 3B Bad or missing memory in slot 2B Bad or missing memory in the BIOS. Intel® Server Boards SE7320SP2 and SE7525GP2 Error Reporting and Handling Error Code 5120 5121 5122 8104 8105 8110 8111 8120 8121 8130 8131 8140 8141 ...
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...POST entry and GPNV area. Uncompress and initialize any platform specific BIOS modules. Initializes different devices through DIM. Check CMOS diagnostic byte to determine if battery power is OK and CMOS checksum is bad, update CMOS with power-on KBC. Disable Cache - Init Local ... A A OFF R OFF Description Disable NMI, parity, video for boot strap processor Early CPU Init Exit Initializes the 8042 compatible Key Board controller. Intel® Server Boards SE7320SP2 and SE7525GP2 Error Reporting and Handling 6.3.3 POST Code Checkpoints Table 65. Initialize status register A.
...POST entry and GPNV area. Uncompress and initialize any platform specific BIOS modules. Initializes different devices through DIM. Check CMOS diagnostic byte to determine if battery power is OK and CMOS checksum is bad, update CMOS with power-on KBC. Disable Cache - Init Local ... A A OFF R OFF Description Disable NMI, parity, video for boot strap processor Early CPU Init Exit Initializes the 8042 compatible Key Board controller. Intel® Server Boards SE7320SP2 and SE7525GP2 Error Reporting and Handling 6.3.3 POST Code Checkpoints Table 65. Initialize status register A.
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...supported) Program the peripheral parameters. Error Reporting and Handling Intel® Server Boards SE7320SP2 and SE7525GP2 Checkpoint 2C 2E 31 33 37 38 39 3A ...R R R R A R A R R G OFF OFF G OFF G G G G G OFF OFF G OFF G G G OFF OFF OFF OFF OFF R R R OFF G R OFF A OFF R G R OFF Description Initializes different devices. Updates CMOS memory size from base memory. Enable / disable NMI as selected Late POST initialization of ESCD in system RAM size if needed before booting to...BIOS Data Area from memory found in the system and update the BDA, EBDA...etc.
...supported) Program the peripheral parameters. Error Reporting and Handling Intel® Server Boards SE7320SP2 and SE7525GP2 Checkpoint 2C 2E 31 33 37 38 39 3A ...R R R R A R A R R G OFF OFF G OFF G G G G G OFF OFF G OFF G G G OFF OFF OFF OFF OFF R R R OFF G R OFF A OFF R G R OFF Description Initializes different devices. Updates CMOS memory size from base memory. Enable / disable NMI as selected Late POST initialization of ESCD in system RAM size if needed before booting to...BIOS Data Area from memory found in the system and update the BDA, EBDA...etc.
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...The bootblock recovery code gets control when the BIOS determines that a BIOS recovery needs to occur because the user has forced the update or the BIOS checksum is uncompressed into memory. Erase the flash part. Copying Main BIOS into register. The following table describes the .... Start reading the recovery file cluster by the recovery file. Detect proper flash part. L1 cache is initialized. Error Reporting and Handling Intel® Server Boards SE7320SP2 and SE7525GP2 Checkpoint D8 D9 DA Diagnostic LED Decoder G=Green, R=Red, A=Amber MSB LSB A R OFF R A R OFF A A R...
...The bootblock recovery code gets control when the BIOS determines that a BIOS recovery needs to occur because the user has forced the update or the BIOS checksum is uncompressed into memory. Erase the flash part. Copying Main BIOS into register. The following table describes the .... Start reading the recovery file cluster by the recovery file. Detect proper flash part. L1 cache is initialized. Error Reporting and Handling Intel® Server Boards SE7320SP2 and SE7525GP2 Checkpoint D8 D9 DA Diagnostic LED Decoder G=Green, R=Red, A=Amber MSB LSB A R OFF R A R OFF A A R...
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...the DIM module is accessed: Table 68. Indicates the system is running in ACPI mode. Intel® Server Boards SE7320SP2 and SE7525GP2 Error Reporting and Handling The flash has been updated successfully. Restore CPUID value back into register. The following functions: Boot Input Device Initialization (... Checkpoint 2A 38 Description Initialize different buses and perform the following table describes the type of checkpoints that may occur during BIOS POST to an automatic configuration and configures all PnP and PCI boot devices. Function 0 disables all static devices that are...
...the DIM module is accessed: Table 68. Indicates the system is running in ACPI mode. Intel® Server Boards SE7320SP2 and SE7525GP2 Error Reporting and Handling The flash has been updated successfully. Restore CPUID value back into register. The following functions: Boot Input Device Initialization (... Checkpoint 2A 38 Description Initialize different buses and perform the following table describes the type of checkpoints that may occur during BIOS POST to an automatic configuration and configures all PnP and PCI boot devices. Function 0 disables all static devices that are...
Product Specification
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... through system reset is typically used to boot using the BIOS programmed in the Flash memory. Intel® Server Boards SE7320SP2 and SE7525GP2 Connector Definitions and Pin-outs 7.16 Configuration Jumpers This section... describes the configuration jumpers on the server boards. 7.16.1 System Recovery and Update Jumpers The server boards provide an 11-pin single inline header (J17), located on reset. If pins 1 and 2 are jumpered (default), the current BIOS...
... through system reset is typically used to boot using the BIOS programmed in the Flash memory. Intel® Server Boards SE7320SP2 and SE7525GP2 Connector Definitions and Pin-outs 7.16 Configuration Jumpers This section... describes the configuration jumpers on the server boards. 7.16.1 System Recovery and Update Jumpers The server boards provide an 11-pin single inline header (J17), located on reset. If pins 1 and 2 are jumpered (default), the current BIOS...