Specification Update
Page 28
... time may be applied to which is computed by dividing the maximum possible core frequency by exactly one multiple of Changes. Workaround: None Identified. Workaround: Multiply the performance monitor value by the frequency of the above cases. The extent... and an address references a large page the resulting translated physical address may experience a memory 28 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update Status: For the steppings affected, see the Summary Tables of ...
... time may be applied to which is computed by dividing the maximum possible core frequency by exactly one multiple of Changes. Workaround: None Identified. Workaround: Multiply the performance monitor value by the frequency of the above cases. The extent... and an address references a large page the resulting translated physical address may experience a memory 28 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update Status: For the steppings affected, see the Summary Tables of ...
Specification Update
Page 33
... not use values in (E)CX that memory accesses in IA-32e Mode Problem: When the processor is taken out of Changes. Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 33 Specification Update EIP May be incorrect. AI29. #GP Fault is...: None identified. Status: For the steppings affected, see the Summary Tables of Changes. Errata Workaround: Software should ensure that when multiplied by the data size give values larger than the address space size (64K for 16-bit address size and 4G for 32-bit...
... not use values in (E)CX that memory accesses in IA-32e Mode Problem: When the processor is taken out of Changes. Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 33 Specification Update EIP May be incorrect. AI29. #GP Fault is...: None identified. Status: For the steppings affected, see the Summary Tables of Changes. Errata Workaround: Software should ensure that when multiplied by the data size give values larger than the address space size (64K for 16-bit address size and 4G for 32-bit...
Specification Update
Page 55
...Some Decoded Instructions Problem: MACRO_INSTS.DECODED performance monitoring counter (Event 0AAH, Umask 01H) counts the number of Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 55 Specification Update Workaround: None identified. AI94. No other instruction is Counted Incorrectly ... the performance monitoring counter MACRO_INST.DECODED may result in the Optimizing the Front End section of SIMD packed multiply micro-ops executed. Performance Monitoring Event SIMD_UOP_TYPE_EXEC.MUL is affected.
...Some Decoded Instructions Problem: MACRO_INSTS.DECODED performance monitoring counter (Event 0AAH, Umask 01H) counts the number of Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 55 Specification Update Workaround: None identified. AI94. No other instruction is Counted Incorrectly ... the performance monitoring counter MACRO_INST.DECODED may result in the Optimizing the Front End section of SIMD packed multiply micro-ops executed. Performance Monitoring Event SIMD_UOP_TYPE_EXEC.MUL is affected.
Specification Update
Page 58
... hardware for 32-bit address size). Problem: A REP STOS/MOVS to count the number of memory accesses that when multiplied by the performance monitoring event BR_INST_RETIRED.PRED_NOT_TAKEN or BR_INST_RETIRED.ANY may cause some of Changes. The hardware is active. AI102....For the steppings affected, see the Summary Tables of the STOS operations to the monitored address 58 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update AI103. Due to this erratum, REP STOS/MOVS fast string ...
... hardware for 32-bit address size). Problem: A REP STOS/MOVS to count the number of memory accesses that when multiplied by the performance monitoring event BR_INST_RETIRED.PRED_NOT_TAKEN or BR_INST_RETIRED.ANY may cause some of Changes. The hardware is active. AI102....For the steppings affected, see the Summary Tables of the STOS operations to the monitored address 58 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update AI103. Due to this erratum, REP STOS/MOVS fast string ...