Specification Update
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... Technologyŧ December 2010 Notice: The Intel® CoreTM2 Extreme and Intel® CoreTM2 Duo desktop processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Document Number: 313279-027 Intel® Core™2 Extreme Processor X6800Δ and Intel® Core™2 Duo Desktop Processor E6000Δ and E4000Δ Sequence...
... Technologyŧ December 2010 Notice: The Intel® CoreTM2 Extreme and Intel® CoreTM2 Duo desktop processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Document Number: 313279-027 Intel® Core™2 Extreme Processor X6800Δ and Intel® Core™2 Duo Desktop Processor E6000Δ and E4000Δ Sequence...
Specification Update
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... system. Copyright © 2006 - 2010, Intel Corporation 2 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update Current characterized errata are not intended for operation a computer system with Intel® Virtualization Technology, an Intel Trusted Execution Technology-enabled Intel processor, chipset, BIOS, Authenticated Code Modules, and an Intel or other countries. *Other names...
... system. Copyright © 2006 - 2010, Intel Corporation 2 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update Current characterized errata are not intended for operation a computer system with Intel® Virtualization Technology, an Intel Trusted Execution Technology-enabled Intel processor, chipset, BIOS, Authenticated Code Modules, and an Intel or other countries. *Other names...
Specification Update
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... -006 -007 -008 -009 -010 -011 -012 Description • Initial release of the Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 Sequence Specification Update • Updated Erratum AI19, AI29 and AI40 • Added Erratum AI58-AI67 •... Apr 2007 Apr 2007 Out Of Cycle 4 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update AI94 • Added L step information • Added processor number E4300 information • Updated Erratum AI70 ...
... -006 -007 -008 -009 -010 -011 -012 Description • Initial release of the Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 Sequence Specification Update • Updated Erratum AI19, AI29 and AI40 • Added Erratum AI58-AI67 •... Apr 2007 Apr 2007 Out Of Cycle 4 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update AI94 • Added L step information • Added processor number E4300 information • Updated Erratum AI70 ...
Specification Update
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... AI79, AI91, AI92, AI94, AI101, AI109 • Added processor number E4600 information • Added Erratum AI124 • Updated Plan status for AI6, AI21 - Revision Description -013 -014 -015 -016 -017 • Added Erratum AI105 • Added Specification Clarification AI1 • Updated Erratum AI14, AI25 and AI26 •... Nov 2007 Dec 2007 Jan 16th 2008 Feb 13th 2008 Mar 3rd 2008 May 2008 December 8th, 2010 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 5 Specification Update AI42, AI44, AI50, AI55 -
... AI79, AI91, AI92, AI94, AI101, AI109 • Added processor number E4600 information • Added Erratum AI124 • Updated Plan status for AI6, AI21 - Revision Description -013 -014 -015 -016 -017 • Added Erratum AI105 • Added Specification Clarification AI1 • Updated Erratum AI14, AI25 and AI26 •... Nov 2007 Dec 2007 Jan 16th 2008 Feb 13th 2008 Mar 3rd 2008 May 2008 December 8th, 2010 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 5 Specification Update AI42, AI44, AI50, AI55 -
Specification Update
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... and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide Document Location http://www.intel.com/product s/processor/manuals/index.h tm 6 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update Preface Preface This document is intended for hardware system manufacturers and for software developers of this...
... and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide Document Location http://www.intel.com/product s/processor/manuals/index.h tm 6 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update Preface Preface This document is intended for hardware system manufacturers and for software developers of this...
Specification Update
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... or errors. These clarifications will be taken to the appropriate product specification or user documentation (datasheets, manuals, etc.). § Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 7 Specification Update Under these parts can range from the specification update when the appropriate changes are archived and available upon request. Preface...
... or errors. These clarifications will be taken to the appropriate product specification or user documentation (datasheets, manuals, etc.). § Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 7 Specification Update Under these parts can range from the specification update when the appropriate changes are archived and available upon request. Preface...
Specification Update
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... or update that applies to this erratum. Row Shaded: This item is fixed in a future stepping of the document. 8 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update Status Doc: PlanFix: Fixed: NoFix: Document change does not apply to account for the other outstanding issues through...
... or update that applies to this erratum. Row Shaded: This item is fixed in a future stepping of the document. 8 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update Status Doc: PlanFix: Fixed: NoFix: Document change does not apply to account for the other outstanding issues through...
Specification Update
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...; M processor on 65nm process Dual-Core Intel® Xeon® processor LV Dual-Core Intel® Xeon® processor 5100 series Intel® Core™2 Duo/Solo processor for Intel® Centrino® Duo processor technology Intel® Core™2 Extreme processor X6800 and Intel® Core™2 Duo desktop processor E6000 and E4000 sequence Quad-Core Intel® Xeon® processor 5300 series Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 9 Specification...
...; M processor on 65nm process Dual-Core Intel® Xeon® processor LV Dual-Core Intel® Xeon® processor 5100 series Intel® Core™2 Duo/Solo processor for Intel® Centrino® Duo processor technology Intel® Core™2 Extreme processor X6800 and Intel® Core™2 Duo desktop processor E6000 and E4000 sequence Quad-Core Intel® Xeon® processor 5300 series Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 9 Specification...
Specification Update
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...® dual-core processor Quad-Core Intel® Xeon® processor 3200 series Dual-Core Intel® Xeon® processor 3000 series Intel® Pentium® dual-core desktop processor E2000 sequence Intel® Celeron® processor 500 series Intel® Xeon® processor 7200, 7300 series Intel® Core™2 Extreme processor QX9650 and Intel® Core™2 Quad processor Q9000 series Intel® Core™ 2 Duo processor E8000 series Quad-Core Intel® Xeon® processor 5400 series Dual-Core Intel®...
...® dual-core processor Quad-Core Intel® Xeon® processor 3200 series Dual-Core Intel® Xeon® processor 3000 series Intel® Pentium® dual-core desktop processor E2000 sequence Intel® Celeron® processor 500 series Intel® Xeon® processor 7200, 7300 series Intel® Core™2 Extreme processor QX9650 and Intel® Core™2 Quad processor Q9000 series Intel® Core™ 2 Duo processor E8000 series Quad-Core Intel® Xeon® processor 5400 series Dual-Core Intel®...
Specification Update
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...State from SMRAM AI22 X X X X Fixed Sequential Code Fetch to Non-canonical Address May have Non-deterministic Results AI23 X X X X Fixed VMCALL to Activate Dual-monitor Treatment of SMIs and SMM Ignores Reserved Bit settings in VM-exit Control Field AI24 X X X X X No Fix The PECI Controller Resets to the ... X X Fixed (E)CX May Get Incorrectly Updated When Performing Fast String REP MOVS or Fast String REP STOS With Large Data Structures Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 11 Specification Update
...State from SMRAM AI22 X X X X Fixed Sequential Code Fetch to Non-canonical Address May have Non-deterministic Results AI23 X X X X Fixed VMCALL to Activate Dual-monitor Treatment of SMIs and SMM Ignores Reserved Bit settings in VM-exit Control Field AI24 X X X X X No Fix The PECI Controller Resets to the ... X X Fixed (E)CX May Get Incorrectly Updated When Performing Fast String REP MOVS or Fast String REP STOS With Large Data Structures Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 11 Specification Update
Specification Update
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Summary Tables of Changes NO B1 B2 L2 M0 G0 Plan ERRATA AI31 X X X X Fixed Performance Monitoring Events for Retired Loads (CBH) and Instructions Retired (C0H) May Not Be Accurate AI32 X X X X X No Fix Upper 32 bits of 'From' Address Reported through BTMs or BTSs May be Incorrect AI33 X X X Fixed Unsynchronized Cross-Modifying Code Operations Can Cause Unexpected Instruction Execution Results MSRs Actual Frequency Clock Count (IA32_APERF) or Maximum AI34 X X X X X No Fix Frequency Clock Count (IA32_MPERF) May Contain Incorrect Data after a Machine Check Exception (MCE) AI35 X ...
Summary Tables of Changes NO B1 B2 L2 M0 G0 Plan ERRATA AI31 X X X X Fixed Performance Monitoring Events for Retired Loads (CBH) and Instructions Retired (C0H) May Not Be Accurate AI32 X X X X X No Fix Upper 32 bits of 'From' Address Reported through BTMs or BTSs May be Incorrect AI33 X X X Fixed Unsynchronized Cross-Modifying Code Operations Can Cause Unexpected Instruction Execution Results MSRs Actual Frequency Clock Count (IA32_APERF) or Maximum AI34 X X X X X No Fix Frequency Clock Count (IA32_MPERF) May Contain Incorrect Data after a Machine Check Exception (MCE) AI35 X ...
Specification Update
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...Size or Lead to Unpredictable Behavior AI56 X X X X Fixed Update of Read/Write (R/W) or User/Supervisor (U/S) or Present (P) Bits without TLB Shootdown May Cause Unexpected Processor Behavior AI57 X X X X Fixed BTS Message May Be Lost When the STPCLK# Signal is Set AI73 X X X X X No Fix The BS Flag in 64...M0 G0 Plan ERRATA AI52 X X X X X No Fix Last Branch Records (LBR) Updates May be Set for Non-Single-Step #DB Exception Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 13 Specification Update
...Size or Lead to Unpredictable Behavior AI56 X X X X Fixed Update of Read/Write (R/W) or User/Supervisor (U/S) or Present (P) Bits without TLB Shootdown May Cause Unexpected Processor Behavior AI57 X X X X Fixed BTS Message May Be Lost When the STPCLK# Signal is Set AI73 X X X X X No Fix The BS Flag in 64...M0 G0 Plan ERRATA AI52 X X X X X No Fix Last Branch Records (LBR) Updates May be Set for Non-Single-Step #DB Exception Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 13 Specification Update
Specification Update
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... X X X X X No Fix Last Branch Records (LBR) Updates May be Incorrect After a Task Switch AI79 X X X X Fixed REP Store Instructions in a Specific Situation may cause the Processor to Hang AI80 X X X X X No Fix Performance Monitoring Events for L1 and L2 Miss May Not be Accurate AI81 X X X X X No Fix Store ... Instructions AI95 X X X X Fixed The Stack Size May be Incorrect as a Result of VIP/VIF Check on SYSEXIT and SYSRET 14 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update
... X X X X X No Fix Last Branch Records (LBR) Updates May be Incorrect After a Task Switch AI79 X X X X Fixed REP Store Instructions in a Specific Situation may cause the Processor to Hang AI80 X X X X X No Fix Performance Monitoring Events for L1 and L2 Miss May Not be Accurate AI81 X X X X X No Fix Store ... Instructions AI95 X X X X Fixed The Stack Size May be Incorrect as a Result of VIP/VIF Check on SYSEXIT and SYSRET 14 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update
Specification Update
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... in a Processor Hang AI115 X X X X X No Fix Instruction Fetch May Cause a Livelock During Snoops of the L1 Data Cache AI116 X X X X X No Fix Use of Memory Aliasing with Inconsistent Memory Type may Cause a System Hang or a Machine Check Exception Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 15 Specification Update
... in a Processor Hang AI115 X X X X X No Fix Instruction Fetch May Cause a Livelock During Snoops of the L1 Data Cache AI116 X X X X X No Fix Use of Memory Aliasing with Inconsistent Memory Type may Cause a System Hang or a Machine Check Exception Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 15 Specification Update
Specification Update
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There are no Documentation Changes in this Specification Update revision. § 16 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update There are Not Cleared When the Processor is Reset AI122 X Fixed VTPR Access May Lead to System Hang AI123 X Fixed IA32_MC1_STATUS MSR Bit[60] Does Not Reflect Machine...
There are no Documentation Changes in this Specification Update revision. § 16 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update There are Not Cleared When the Processor is Reset AI122 X Fixed VTPR Access May Lead to System Hang AI123 X Fixed IA32_MC1_STATUS MSR Bit[60] Does Not Reflect Machine...
Specification Update
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Identification Information Identification Information Figure 1. Intel® Core™2 Duo Desktop Processor 2M SKU Package with 800 MHz FSB INTEL M ©'05 E4500 INTEL® CORE™2 DUO SLxxx [COO] 2.20GHZ/2M/800/06 [FPO] e4 ATPO S/N Figure 2. Intel® Core™2 Duo Desktop Processor 2M SKU Package with 1066 MHz FSB INTEL M ©'05 INTEL® CORE™2 DUO 6400 SLxxx [COO] 2.13GHZ/2M/1066/06 [FPO] e4 ATPO S/N Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 17 Specification Update
Identification Information Identification Information Figure 1. Intel® Core™2 Duo Desktop Processor 2M SKU Package with 800 MHz FSB INTEL M ©'05 E4500 INTEL® CORE™2 DUO SLxxx [COO] 2.20GHZ/2M/800/06 [FPO] e4 ATPO S/N Figure 2. Intel® Core™2 Duo Desktop Processor 2M SKU Package with 1066 MHz FSB INTEL M ©'05 INTEL® CORE™2 DUO 6400 SLxxx [COO] 2.13GHZ/2M/1066/06 [FPO] e4 ATPO S/N Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 17 Specification Update
Specification Update
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... processors support the 775_VR_CONFIG_06 specifications. 2. These parts support Intel® 64 Architecture 4. These processors support the 775_VR_CONFIG_05B specifications 3. These parts have Extended HALT (C1E) power of 8W 20 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update Component Identification Information Component Identification Information The Intel® Core™2 Extreme processor and Intel® Core™2 Duo desktop processor...
... processors support the 775_VR_CONFIG_06 specifications. 2. These parts support Intel® 64 Architecture 4. These processors support the 775_VR_CONFIG_05B specifications 3. These parts have Extended HALT (C1E) power of 8W 20 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update Component Identification Information Component Identification Information The Intel® Core™2 Extreme processor and Intel® Core™2 Duo desktop processor...
Specification Update
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..., 15 775-land LGA 1, 3, 4, 6, 7, 8, 9, 10, 11, 12, 13, 16 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 21 Specification Update Component Identification Information Table 1. Intel® Core™2 Duo Desktop Processor 2M SKU Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Processor Number SL9SA B2 2M 06F6h E6300 SL9S9 B2 2M...
..., 15 775-land LGA 1, 3, 4, 6, 7, 8, 9, 10, 11, 12, 13, 16 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 21 Specification Update Component Identification Information Table 1. Intel® Core™2 Duo Desktop Processor 2M SKU Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Processor Number SL9SA B2 2M 06F6h E6300 SL9S9 B2 2M...
Specification Update
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..., 17 Table 3. Intel® Core™2 Extreme Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Processor Number SL9S5 B2 4M 06F6h X6800 Speed Core/Bus 2.93 GHz / 1066 MHz Package 775-land LGA Notes 2, 3, 4, 6, 7, 8, 9, 10, 11, 12, 13, 15 22 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update
..., 17 Table 3. Intel® Core™2 Extreme Processor Identification Information S-Spec Core Stepping L2 Cache Size (bytes) Processor Signature Processor Number SL9S5 B2 4M 06F6h X6800 Speed Core/Bus 2.93 GHz / 1066 MHz Package 775-land LGA Notes 2, 3, 4, 6, 7, 8, 9, 10, 11, 12, 13, 15 22 Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence Specification Update
Specification Update
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... Interrupt Service Routine (ISR) set . Status: For the steppings affected, see the Summary Tables of Changes. Workaround: None identified. Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 23 Specification Update Errata Errata AI1. AI2. LOCK# Asserted During a Special Cycle Shutdown Transaction May Unexpectedly De-assert Problem: During...
... Interrupt Service Routine (ISR) set . Status: For the steppings affected, see the Summary Tables of Changes. Workaround: None identified. Intel® Core™2 Extreme Processor X6800 and Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence 23 Specification Update Errata Errata AI1. AI2. LOCK# Asserted During a Special Cycle Shutdown Transaction May Unexpectedly De-assert Problem: During...