Data Sheet
Page 2
... Execute Disable Bit functionality requires a PC with a processor with a processor, chipset, BIOS, virtual machine monitor (VMM) and for some uses, certain platform software enabled for conflicts or incompatibilities arising from published specifications. Current roadmap processor number progression is not necessarily representative of performance. See www.intel.com/products/processor_number for more information. See the Processor Spec Finder at any features or instructions marked "reserved...
... Execute Disable Bit functionality requires a PC with a processor with a processor, chipset, BIOS, virtual machine monitor (VMM) and for some uses, certain platform software enabled for conflicts or incompatibilities arising from published specifications. Current roadmap processor number progression is not necessarily representative of performance. See www.intel.com/products/processor_number for more information. See the Processor Spec Finder at any features or instructions marked "reserved...
Data Sheet
Page 5
... 23 Boxed Processor Fan Heatsink Power Cable Connector Description 94 24 Baseboard Power Header Placement Relative to Processor Socket 95 25 Boxed Processor Fan Heatsink Airspace Keepout Requirements (side 1 view 96 26 Boxed Processor Fan Heatsink Airspace Keepout Requirements (side 2 view 96 27 Boxed Processor Fan Heatsink Set Points 97 Datasheet 5 Left Side 42 13 land-out Diagram (Top View - Right Side 43 14 Processor Series Thermal Profile 77 15 Case Temperature...
... 23 Boxed Processor Fan Heatsink Power Cable Connector Description 94 24 Baseboard Power Header Placement Relative to Processor Socket 95 25 Boxed Processor Fan Heatsink Airspace Keepout Requirements (side 1 view 96 26 Boxed Processor Fan Heatsink Airspace Keepout Requirements (side 2 view 96 27 Boxed Processor Fan Heatsink Set Points 97 Datasheet 5 Left Side 42 13 land-out Diagram (Top View - Right Side 43 14 Processor Series Thermal Profile 77 15 Case Temperature...
Data Sheet
Page 7
...; Supports Intel® 64 architecture • Supports Intel® Virtualization Technology (Intel® VT) (Intel® Pentium® Dual-Core processor E6000 series only) • Supports Execute Disable Bit capability • FSB frequency at 800 MHz (Intel® Pentium® Dual-Core processor E5000 series) • FSB frequency at 1066 MHz (Intel® Pentium® Dual-Core processor E6000 series) • Binary compatible with applications running on advanced 32-bit operating systems • Intel® Advanced Smart Cache •...
...; Supports Intel® 64 architecture • Supports Intel® Virtualization Technology (Intel® VT) (Intel® Pentium® Dual-Core processor E6000 series only) • Supports Execute Disable Bit capability • FSB frequency at 800 MHz (Intel® Pentium® Dual-Core processor E5000 series) • FSB frequency at 1066 MHz (Intel® Pentium® Dual-Core processor E6000 series) • Binary compatible with applications running on advanced 32-bit operating systems • Intel® Advanced Smart Cache •...
Data Sheet
Page 9
... Extension 3 (SSSE3). The Intel® Pentium® dual-core processor E6000 series supports Intel® Virtualization Technology (Intel® VT). In the case of signals where the name does not imply an active state but describes part of L2 cache. For example, D[3:0] = 'HLHL' refers to a hex 'A', and D[3:0]# = 'LHLH' also refers to frequently used data. The Intel Enhanced Core™ microarchitecture combines the performance of previous generation...
... Extension 3 (SSSE3). The Intel® Pentium® dual-core processor E6000 series supports Intel® Virtualization Technology (Intel® VT). In the case of signals where the name does not imply an active state but describes part of L2 cache. For example, D[3:0] = 'HLHL' refers to a hex 'A', and D[3:0]# = 'LHLH' also refers to frequently used data. The Intel Enhanced Core™ microarchitecture combines the performance of previous generation...
Data Sheet
Page 10
... on or near the processor that system design can not use. • Processor core - A new foundation for heatsink attach, a retention mechanism is independent of the socket. • FSB (Front Side Bus) - Execute Disable Bit allows memory to the interface between the processor and chipset over the FSB. • Storage conditions - This feature can thus help improve the overall 10 Datasheet Introduction 1.1.1 "Front Side...
... on or near the processor that system design can not use. • Processor core - A new foundation for heatsink attach, a retention mechanism is independent of the socket. • FSB (Front Side Bus) - Execute Disable Bit allows memory to the interface between the processor and chipset over the FSB. • Storage conditions - This feature can thus help improve the overall 10 Datasheet Introduction 1.1.1 "Front Side...
Data Sheet
Page 11
...; Dual-Core Processor E6000 and E5000 Series Specification Update Intel® Core™2 Duo processor E8000 and E7000 Series, and Intel® Pentium® Dual-Core Processor E6000 and E5000 Series Thermal and Mechanical Design Guidelines Voltage Regulator-Down (VRD) 11.0 Processor Power Delivery Design Guidelines For Desktop LGA775 Socket LGA775 Socket Mechanical Design Guide Intel® 64 and IA-32 Intel Architecture Software Developer's Manuals Volume 1: Basic Architecture Volume 2A: Instruction Set...
...; Dual-Core Processor E6000 and E5000 Series Specification Update Intel® Core™2 Duo processor E8000 and E7000 Series, and Intel® Pentium® Dual-Core Processor E6000 and E5000 Series Thermal and Mechanical Design Guidelines Voltage Regulator-Down (VRD) 11.0 Processor Power Delivery Design Guidelines For Desktop LGA775 Socket LGA775 Socket Mechanical Design Guide Intel® 64 and IA-32 Intel Architecture Software Developer's Manuals Volume 1: Basic Architecture Volume 2A: Instruction Set...
Data Sheet
Page 14
... voltage set by the processor during manufacturing such that is requested, it must be noted that this table refers to a high voltage level and a '0' refers to the processor VCC lands (see Chapter 2.6.3 for proper [A]GTL+ bus operation. See the Intel® Pentium® dualcore Processor E6000 and E5000 Series Specification Update for each processor frequency is defined by the motherboard...
... voltage set by the processor during manufacturing such that is requested, it must be noted that this table refers to a high voltage level and a '0' refers to the processor VCC lands (see Chapter 2.6.3 for proper [A]GTL+ bus operation. See the Intel® Pentium® dualcore Processor E6000 and E5000 Series Specification Update for each processor frequency is defined by the motherboard...
Data Sheet
Page 17
Absolute Maximum and Minimum Ratings Symbol Parameter Min VCC Core voltage with respect to VSS -0.3 VTT FSB termination voltage with its reliability will not affect the long-term reliability of time then, when returned to VSS -0.3 TCASE Processor case temperature See Section 5 TSTORAGE Processor storage temperature -40 Max 1.45 1.45 See Section 5 85 Unit Notes1, 2 V - If a device is...
Absolute Maximum and Minimum Ratings Symbol Parameter Min VCC Core voltage with respect to VSS -0.3 VTT FSB termination voltage with its reliability will not affect the long-term reliability of time then, when returned to VSS -0.3 TCASE Processor case temperature See Section 5 TSTORAGE Processor storage temperature -40 Max 1.45 1.45 See Section 5 85 Unit Notes1, 2 V - If a device is...
Data Sheet
Page 18
... µA 1 3, 4, 5 6 7, 8 9 NOTES: 18 Datasheet Voltage and Current Specifications Symbol Parameter Min Typ Max Unit Notes2, 10 VID Range VID 0.8500 - 1.3625 V Core VCC Processor Number (2 MB Cache): VCC for 775_VR_CONFIG_06: E6800 3.33 GHz E6700 3.20 GHz E6600 3.06 GHz E6500 2.93 GHz E6300 2.80 GHz See Table 5, Figure 1 V E5200 2.50 GHz E5300 2.66 GHz E5400 2.70 GHz E5500 2.80 GHz E5700 3.00 GHz E5800 3.20 GHz VCC_BOOT VCCPLL ICC...
... µA 1 3, 4, 5 6 7, 8 9 NOTES: 18 Datasheet Voltage and Current Specifications Symbol Parameter Min Typ Max Unit Notes2, 10 VID Range VID 0.8500 - 1.3625 V Core VCC Processor Number (2 MB Cache): VCC for 775_VR_CONFIG_06: E6800 3.33 GHz E6700 3.20 GHz E6600 3.06 GHz E6500 2.93 GHz E6300 2.80 GHz See Table 5, Figure 1 V E5200 2.50 GHz E5300 2.66 GHz E5400 2.70 GHz E5500 2.80 GHz E5700 3.00 GHz E5800 3.20 GHz VCC_BOOT VCCPLL ICC...
Data Sheet
Page 27
... to all specifications in previous generation processors, the processor's core frequency is to VSS. 2.8 Clock Specifications 2.8.1 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking BCLK[1:0] directly controls the FSB interface speed as well as the core frequency of the BCLK[1:0] frequency. RTT is used on the processor clocking, contact your Intel field representative. The processor bus ratio multiplier will be set at VTT...
... to all specifications in previous generation processors, the processor's core frequency is to VSS. 2.8 Clock Specifications 2.8.1 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking BCLK[1:0] directly controls the FSB interface speed as well as the core frequency of the BCLK[1:0] frequency. RTT is used on the processor clocking, contact your Intel field representative. The processor bus ratio multiplier will be set at VTT...
Data Sheet
Page 28
... Datasheet Individual processors operate only at a 800 MHz FSB frequency (selected by a 200 MHz BCLK[1:0] frequency). The Intel® Pentium® dualcore processor E6000 series operates at the same frequency. Listed frequencies are used to FSB Frequency 1/6 1/7 1/7.5 1/8 1/8.5 1/9 1/9.5 1/10 1/10.5 1/11 1/11.5 1/12 1/12.5 1/13 1/13.5 1/14 1/15 Core Frequency (200 MHz BCLK/ 800 MHz FSB) 1.20 GHz 1.40 GHz 1.5 GHz 1.60 GHz 1.70 GHz 1.80 GHz...
... Datasheet Individual processors operate only at a 800 MHz FSB frequency (selected by a 200 MHz BCLK[1:0] frequency). The Intel® Pentium® dualcore processor E6000 series operates at the same frequency. Listed frequencies are used to FSB Frequency 1/6 1/7 1/7.5 1/8 1/8.5 1/9 1/9.5 1/10 1/10.5 1/11 1/11.5 1/12 1/12.5 1/13 1/13.5 1/14 1/15 Core Frequency (200 MHz BCLK/ 800 MHz FSB) 1.20 GHz 1.40 GHz 1.5 GHz 1.60 GHz 1.70 GHz 1.80 GHz...
Data Sheet
Page 30
...a 5 ns period and a +0.5% maximum variance due to spread spectrum clocking. 3. FSB Differential Clock Specifications (800 MHz FSB) T# Parameter Min Nom Max Unit Figure Notes1 BCLK[1:0] Frequency 198.980 - 200.020 MHz - 2 T1: ...processor core frequencies based on the average cross point where Clock rising meets Clock# falling. Matching applies to all specifications in this specification as the worst case timing difference between successive crossover voltages. Notes1 6 2 3 4 5 NOTES: 1. The Min period specification is measured using a ±75 mV window...
...a 5 ns period and a +0.5% maximum variance due to spread spectrum clocking. 3. FSB Differential Clock Specifications (800 MHz FSB) T# Parameter Min Nom Max Unit Figure Notes1 BCLK[1:0] Frequency 198.980 - 200.020 MHz - 2 T1: ...processor core frequencies based on the average cross point where Clock rising meets Clock# falling. Matching applies to all specifications in this specification as the worst case timing difference between successive crossover voltages. Notes1 6 2 3 4 5 NOTES: 1. The Min period specification is measured using a ±75 mV window...
Data Sheet
Page 33
... with socket load plate actuation and installation of a processor core mounted on the LGA775 socket. Figure 5 shows a sketch of the processor package components and how they are not part of processor package. Datasheet 33 Package Mechanical Drawing The package mechanical drawings are in mm [in]. • Guidelines on potential IHS flatness variation with the motherboard using an LGA775 socket. An integrated heat spreader...
... with socket load plate actuation and installation of a processor core mounted on the LGA775 socket. Figure 5 shows a sketch of the processor package components and how they are not part of processor package. Datasheet 33 Package Mechanical Drawing The package mechanical drawings are in mm [in]. • Guidelines on potential IHS flatness variation with the motherboard using an LGA775 socket. An integrated heat spreader...
Data Sheet
Page 38
... Resin Gold Plated Copper 3.8 Figure 9. Intel® Pentium® Dual-Core Processor E5000 Series Top-Side Markings Example INTEL ©M'06 E5200 Intel® Pentium® Dual-Core SLAY7 [COO] 2.50GHZ/2M/800/06 [FPO] e4 ATPO S/N 38 Datasheet This mass [weight] includes all the components that are included in the LGA775 Socket Mechanical Design Guide. 3.6 Processor Mass Specification The typical mass of the package...
... Resin Gold Plated Copper 3.8 Figure 9. Intel® Pentium® Dual-Core Processor E5000 Series Top-Side Markings Example INTEL ©M'06 E5200 Intel® Pentium® Dual-Core SLAY7 [COO] 2.50GHZ/2M/800/06 [FPO] e4 ATPO S/N 38 Datasheet This mass [weight] includes all the components that are included in the LGA775 Socket Mechanical Design Guide. 3.6 Processor Mass Specification The typical mass of the package...
Data Sheet
Page 68
.... See Section 2.6.2 for service. When STPCLK# is not asserted, FERR#/PBE# indicates a floating-point error and will be continued by STPCLK#. When STPCLK# is asserted, an assertion of the Intel Architecture Software Developer's Manual and the Intel Processor Identification and the CPUID Instruction application note. GTLREF is asserted to the processor to ignore a numeric error and continue to the...
.... See Section 2.6.2 for service. When STPCLK# is not asserted, FERR#/PBE# indicates a floating-point error and will be continued by STPCLK#. When STPCLK# is asserted, an assertion of the Intel Architecture Software Developer's Manual and the Intel Processor Identification and the CPUID Instruction application note. GTLREF is asserted to the processor to ignore a numeric error and continue to the...
Data Sheet
Page 69
...processor FSB, it will go active when the processor temperature monitoring sensor detects that the processor Thermal Control Circuit (TCC) has been activated, if enabled. As an alternative to MSID, Intel has implemented the Power Segment Identifier (PSID) to arbitrate for Output details. Input/ PECI... be used as BCLK[1:0] references for a debug port implemented on the Pentium processor. See Section 5.2.4 for additional information regarding PSID. Datasheet 69 For a locked sequence of transactions, LOCK# is implemented in the system, ITP_CLK[1:0] are backward compatible with ...
...processor FSB, it will go active when the processor temperature monitoring sensor detects that the processor Thermal Control Circuit (TCC) has been activated, if enabled. As an alternative to MSID, Intel has implemented the Power Segment Identifier (PSID) to arbitrate for Output details. Input/ PECI... be used as BCLK[1:0] references for a debug port implemented on the Pentium processor. See Section 5.2.4 for additional information regarding PSID. Datasheet 69 For a locked sequence of transactions, LOCK# is implemented in the system, ITP_CLK[1:0] are backward compatible with ...
Data Sheet
Page 90
... a technology that the top frequency for the processor can be exceeded. - PSI# can not be used to processor MSRs (Model Specific Registers); This technology enables the processor to switch between frequency and voltage points, which the processor shifts to the new frequency and Vcc is in platform power savings. It alters the performance of the voltage regulator, resulting in...
... a technology that the top frequency for the processor can be exceeded. - PSI# can not be used to processor MSRs (Model Specific Registers); This technology enables the processor to switch between frequency and voltage points, which the processor shifts to the new frequency and Vcc is in platform power savings. It alters the performance of the voltage regulator, resulting in...
Data Sheet
Page 97
... 38 ºC. Boxed Processor Fan Heatsink Set Points Increasing Fan Speed & Noise Higher Set Point Highest Noise Level Lower Set Point Lowest Noise Level X Y Z Internal Chassis Temperature (Degrees C) Datasheet 97 Figure 27. Systems should be designed to provide adequate air around the boxed processor fan heatsink that point, the fan speed is the responsibility of the variable speed fan for the specific requirements. The motherboard must supply a constant...
... 38 ºC. Boxed Processor Fan Heatsink Set Points Increasing Fan Speed & Noise Higher Set Point Highest Noise Level Lower Set Point Lowest Noise Level X Y Z Internal Chassis Temperature (Degrees C) Datasheet 97 Figure 27. Systems should be designed to provide adequate air around the boxed processor fan heatsink that point, the fan speed is the responsibility of the variable speed fan for the specific requirements. The motherboard must supply a constant...
Data Sheet
Page 98
... compatibility with PWM output (CONTROL see Section 1.2). § 98 Datasheet For more accurate measurement of processor die temperature through the use of an ASIC located on specific motherboard requirements for 4-wire based fan speed control, see the appropriate Thermal and Mechanical Design Guidelines (see Table 30) and remote thermal diode measurement capability, the boxed processor will default back to this set...
... compatibility with PWM output (CONTROL see Section 1.2). § 98 Datasheet For more accurate measurement of processor die temperature through the use of an ASIC located on specific motherboard requirements for 4-wire based fan speed control, see the appropriate Thermal and Mechanical Design Guidelines (see Table 30) and remote thermal diode measurement capability, the boxed processor will default back to this set...
Data Sheet
Page 99
... also affect the electrical performance of an LAI: mechanical and electrical. Cabling that is part of Intel Pentium® dual-core processor E5000 and E6000 series systems, the LAI is possible that their logic analyzer interfaces. If this is installed between the processor and a logic analyzer. Specific information must make sure that can make use in debugging Intel Pentium® dual-core processor E5000 and E6000...
... also affect the electrical performance of an LAI: mechanical and electrical. Cabling that is part of Intel Pentium® dual-core processor E5000 and E6000 series systems, the LAI is possible that their logic analyzer interfaces. If this is installed between the processor and a logic analyzer. Specific information must make sure that can make use in debugging Intel Pentium® dual-core processor E5000 and E6000...
