Acer Veriton X680G Desktop Service Guide
Page 58
... full memory sizing module. Bootblock code is copied from this point if needed for debugging. Performs main BIOS checksum and updates recovery status accordingly. If BIOS recovery is necessary,control flows to flat mode with 4GB limit and GA20 enabled. The Runtime module is...Copies compressed boot block code to memory in Boot block code. Main BIOS checksum is done. Store the Uncompressed pointer for faster access. Early Boot Strap Processor (BSP) initialization like microcode update, frequency and other components before memory detection. If memory sizing module not...
... full memory sizing module. Bootblock code is copied from this point if needed for debugging. Performs main BIOS checksum and updates recovery status accordingly. If BIOS recovery is necessary,control flows to flat mode with 4GB limit and GA20 enabled. The Runtime module is...Copies compressed boot block code to memory in Boot block code. Main BIOS checksum is done. Store the Uncompressed pointer for faster access. Early Boot Strap Processor (BSP) initialization like microcode update, frequency and other components before memory detection. If memory sizing module not...
Acer Veriton X680G Desktop Service Guide
Page 60
...the validity of the recovery file configuration to occur because the user has forced the update or the BIOS checksum is corrupt. Verify that a BIOS recovery needs to the current configuration of the BIOS. Restore CPUID value back into register. Checkpoint E0 E9 EA EB EF F0 F1...configuration. Disable L1 cache. Give control to read from add-in PCI devices. Some interrupt vectors are initialized. The flash has been updated successfully. Set up floppy controller and data. Attempt to F000 ROM at F000:FFF0h. 53 Chapter 4 Disable ATAPI hardware. Disable ATAPI...
...the validity of the recovery file configuration to occur because the user has forced the update or the BIOS checksum is corrupt. Verify that a BIOS recovery needs to the current configuration of the BIOS. Restore CPUID value back into register. Checkpoint E0 E9 EA EB EF F0 F1...configuration. Disable L1 cache. Give control to read from add-in PCI devices. Some interrupt vectors are initialized. The flash has been updated successfully. Set up floppy controller and data. Attempt to F000 ROM at F000:FFF0h. 53 Chapter 4 Disable ATAPI hardware. Disable ATAPI...