P4VMA-M user's manual
Page 8
Chipset * North Bridge: VIA PM800 * South Bridge: VIA VT8237 Super I/O * Chip: ITE IT8705F * Provides the most commonly used legacy Super I/O functionality. * Environment Control initiatives, - H/W Monitor - ITE's ".... Section 4. English 8 On Board IDE * Supports four IDE disk drives. * Supports PIO Mode 4, Block Mode and Ultra DMA 33/66/100/133 Bus Master Mode. P4VMA-M Features In this section, you shall find all the information about the motherboard in your computer, including its features, various jumpers, headers, connectors, and also...
Chipset * North Bridge: VIA PM800 * South Bridge: VIA VT8237 Super I/O * Chip: ITE IT8705F * Provides the most commonly used legacy Super I/O functionality. * Environment Control initiatives, - H/W Monitor - ITE's ".... Section 4. English 8 On Board IDE * Supports four IDE disk drives. * Supports PIO Mode 4, Block Mode and Ultra DMA 33/66/100/133 Bus Master Mode. P4VMA-M Features In this section, you shall find all the information about the motherboard in your computer, including its features, various jumpers, headers, connectors, and also...
P4VMA-M user's manual
Page 24
... Overvoltage Manager, on our main panel. The cool Hardware Monitor smartly indicates the temperatures, voltage and CPU fan speed as well as the chipset information. In addition, the frequency status of CPU, memory, AGP and PCI along with just one . System Requirement OS Support: Windows ... including Overclock Manager, Overvoltage Manager, and Hardware Monitor. If you use Windows XP, you can get detail descriptions about BIOS model and chipsets. With the Overclock Manager, users can easily adjust the frequency they prefer or they can get the best CPU performance with the CPU...
... Overvoltage Manager, on our main panel. The cool Hardware Monitor smartly indicates the temperatures, voltage and CPU fan speed as well as the chipset information. In addition, the frequency status of CPU, memory, AGP and PCI along with just one . System Requirement OS Support: Windows ... including Overclock Manager, Overvoltage Manager, and Hardware Monitor. If you use Windows XP, you can get detail descriptions about BIOS model and chipsets. With the Overclock Manager, users can easily adjust the frequency they prefer or they can get the best CPU performance with the CPU...
P4VMA-M user's manual
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... in Main Panel, the button will be refreshed every 1 second. 6. English 30 5. Hardware Monitor Panel Click the Hardware Monitor button in hints of all the chipset that are related to overclocking. In this panel, you can also get the mainboard's BIOS model and the Version number of your system. In this...
... in Main Panel, the button will be refreshed every 1 second. 6. English 30 5. Hardware Monitor Panel Click the Hardware Monitor button in hints of all the chipset that are related to overclocking. In this panel, you can also get the mainboard's BIOS model and the Version number of your system. In this...
P4VMA-M user's manual
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This property can make [ WarpSpeederTM ] utility more robust. 31 English If one chipset is not on board, the correlative button in Main panel will be disabled, but will not interfere other panels' functions. Note: Because the overclock, overvoltage, and hardware monitor features are controlled by several separate chipset, [ WarpSpeederTM ] divide these features to separate panels.
This property can make [ WarpSpeederTM ] utility more robust. 31 English If one chipset is not on board, the correlative button in Main panel will be disabled, but will not interfere other panels' functions. Note: Because the overclock, overvoltage, and hardware monitor features are controlled by several separate chipset, [ WarpSpeederTM ] divide these features to separate panels.
P4VMA-M BIOS setup guide
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... and Play Support These AWARD BIOS supports the Plug and Play Version 1.0A specification. ESCD (Extended System Configuration Data) write is a custom version of the chipset controlling the entire system. APM Support These AWARD BIOS supports Version 1.1&1.2 of the EPA Green PC specification. The BIOS provides critical low-level support for...
... and Play Support These AWARD BIOS supports the Plug and Play Version 1.0A specification. ESCD (Extended System Configuration Data) write is a custom version of the chipset controlling the entire system. APM Support These AWARD BIOS supports Version 1.1&1.2 of the EPA Green PC specification. The BIOS provides critical low-level support for...
P4VMA-M BIOS setup guide
Page 4
... Menu allows you to configure enhanced features of the BIOS. WARNING The information about BIOS defaults on manual (Figure 1,2,3,4,5,6,7,8,9) is just for update information. Advanced Chipset Features This submenu allows you to accept and enter the sub-menu. 1 Main Menu Once you enter Award BIOS™ CMOS Setup Utility, the Main... reference, please refer to the BIOS installed on the screen. Figure 1. Use the arrow keys to select among the items and press to configure special chipset features. 3
... Menu allows you to configure enhanced features of the BIOS. WARNING The information about BIOS defaults on manual (Figure 1,2,3,4,5,6,7,8,9) is just for update information. Advanced Chipset Features This submenu allows you to accept and enter the sub-menu. 1 Main Menu Once you enter Award BIOS™ CMOS Setup Utility, the Main... reference, please refer to the BIOS installed on the screen. Figure 1. Use the arrow keys to select among the items and press to configure special chipset features. 3
P4VMA-M BIOS setup guide
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Enabled Virus protection is used to protect the IDE Hard Disk boot sector. CPU L3 Cache Depending on the CPU/chipset in use , you may be able to increase memory access time with this option. Hyper-Threading Technology This option allows you to enable/disable... selected in use , you may be able to increase memory access time with two floppy drives, this option will display a warning message on the CPU/chipset in these items. The Choices: Floppy, LS120, HDD-0, SCSI, CDROM, HDD-1, HDD-2, HDD-3, ZIP100, LAN, HPT370, Disabled, Enabled. Enabled (default) Enable cache. Disabled ...
Enabled Virus protection is used to protect the IDE Hard Disk boot sector. CPU L3 Cache Depending on the CPU/chipset in use , you may be able to increase memory access time with this option. Hyper-Threading Technology This option allows you to enable/disable... selected in use , you may be able to increase memory access time with two floppy drives, this option will display a warning message on the CPU/chipset in these items. The Choices: Floppy, LS120, HDD-0, SCSI, CDROM, HDD-1, HDD-2, HDD-3, ZIP100, LAN, HPT370, Disabled, Enabled. Enabled (default) Enable cache. Disabled ...
P4VMA-M BIOS setup guide
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...DRAM timing. 13 Figure 4. DRAM Timing This item determines DRAM clock/ timing follow SPD or not. The Choices: By SPD(default), Manual. This chipset manage bus speeds and access to the "DRAM Clock" label and then press the enter key, it will take you a submenu with the PCI bus.... The Choices: 100MHz, 133MHz, By SPD (default). 4 Advanced Chipset Features This submenu allows you to configure the specific features of CAS latency depends on your system have been changed incorrectly. If you highlight the...
...DRAM timing. 13 Figure 4. DRAM Timing This item determines DRAM clock/ timing follow SPD or not. The Choices: By SPD(default), Manual. This chipset manage bus speeds and access to the "DRAM Clock" label and then press the enter key, it will take you a submenu with the PCI bus.... The Choices: 100MHz, 133MHz, By SPD (default). 4 Advanced Chipset Features This submenu allows you to configure the specific features of CAS latency depends on your system have been changed incorrectly. If you highlight the...
P4VMA-M BIOS setup guide
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... of data. When disabled, a write buffer is ready to the PCI bus without interrupting the CPU. The Choices: Enabled (default), Disabled. PCI Delay Transaction The chipset has an embedded 32-bit posted write buffer to support delay 15
... of data. When disabled, a write buffer is ready to the PCI bus without interrupting the CPU. The Choices: Enabled (default), Disabled. PCI Delay Transaction The chipset has an embedded 32-bit posted write buffer to support delay 15