Service Guide
Page 160
... registers Setup DRAM control register for normal operation and enable Enable RCOMP Clear DRAM initialization bit in the SB Initialization Sequence Completed, program graphic clocks Program Thermal Throttling Table 4-4. BDS & Specific action: Phase POST Code Range 0x00 0x12 Report the legacy boot is happening Wake ...hard ware ECC init 0x28 Report status code of every memory range 0x50 0x51 Get the root bridge handle twa Notify pci bus driver starts to program the resource 0x58 Reset the host controller Sof 0x5A e 0x79 IdeBus begin initialization Report that the remote terminal ...
... registers Setup DRAM control register for normal operation and enable Enable RCOMP Clear DRAM initialization bit in the SB Initialization Sequence Completed, program graphic clocks Program Thermal Throttling Table 4-4. BDS & Specific action: Phase POST Code Range 0x00 0x12 Report the legacy boot is happening Wake ...hard ware ECC init 0x28 Report status code of every memory range 0x50 0x51 Get the root bridge handle twa Notify pci bus driver starts to program the resource 0x58 Reset the host controller Sof 0x5A e 0x79 IdeBus begin initialization Report that the remote terminal ...