DP67BA Technical Product Specification
Page 59
... Setup configuration jumper is set to configure mode and the computer is shown below. The menu bar is powered-up, the BIOS compares the CPU version and the microcode version in the Serial Peripheral Interface Flash Memory (SPI Flash) and can be updated using a disk-based program. 3...program, POST, the PCI auto-configuration utility, LAN EEPROM information, and Plug and Play support. The BIOS displays a message during POST identifying the type of BIOS Features 3.1 Introduction The board uses an Intel BIOS that is stored in the BIOS and reports if the two match. Maintenance Main ...
... Setup configuration jumper is set to configure mode and the computer is shown below. The menu bar is powered-up, the BIOS compares the CPU version and the microcode version in the Serial Peripheral Interface Flash Memory (SPI Flash) and can be updated using a disk-based program. 3...program, POST, the PCI auto-configuration utility, LAN EEPROM information, and Plug and Play support. The BIOS displays a message during POST identifying the type of BIOS Features 3.1 Introduction The board uses an Intel BIOS that is stored in the BIOS and reports if the two match. Maintenance Main ...
DP67BA Technical Product Specification
Page 73
... for APs End CPU SMM Init CPU DXE Phase 0x47 CPU DXE Phase begin 0x48 Refresh memory space attributes according to MTRRs 0x49 Load the microcode if needed 0x4A Initialize strings to HII database 0x4B 0x4C Initialize MP support CPU DXE Phase End CPU DXE SMM Phase 0x4D CPU DXE SMM Phase... begin 0x4E Relocate SM bases for all APs 0x4F CPU DXE SMM Phase end I/O BUSES 0x50 Enumerating PCI buses 0x51 0x52 Allocating ...
... for APs End CPU SMM Init CPU DXE Phase 0x47 CPU DXE Phase begin 0x48 Refresh memory space attributes according to MTRRs 0x49 Load the microcode if needed 0x4A Initialize strings to HII database 0x4B 0x4C Initialize MP support CPU DXE Phase End CPU DXE SMM Phase 0x4D CPU DXE SMM Phase... begin 0x4E Relocate SM bases for all APs 0x4F CPU DXE SMM Phase end I/O BUSES 0x50 Enumerating PCI buses 0x51 0x52 Allocating ...