Aspire X1200 / X3200 Service Guide
Page 15
... retained when power is a hardware configuration program built into the system's Basic Input/Output System (BIOS). This memory area is not part of the system RAM which allows configuration data to run the PhoenixBIOS Setup Utility, make changes to the BIOS setup NOTE: If you run this guide. The screenshots used... under the following conditions. In this guide display default system values. You will be the same those found in a battery-backed nonvolatile memory called CMOS RAM. Chapter 2 System Utilities Phoenix BIOS Setup Utility BIOS setup is turned off.
... retained when power is a hardware configuration program built into the system's Basic Input/Output System (BIOS). This memory area is not part of the system RAM which allows configuration data to run the PhoenixBIOS Setup Utility, make changes to the BIOS setup NOTE: If you run this guide. The screenshots used... under the following conditions. In this guide display default system values. You will be the same those found in a battery-backed nonvolatile memory called CMOS RAM. Chapter 2 System Utilities Phoenix BIOS Setup Utility BIOS setup is turned off.
Aspire X1200 / X3200 Service Guide
Page 69
... interface swap (optional) 3 Reset keyboard for Winbond 977 series Super I/O chops Reserved Reserved Reserved Test F000h segment shadow to E000 and F000 shadow RAM Expand the X group codes locating in F000 for keyboard and mouse followed by functions. POST Code (Hex) CFh C0h C1h C3h C5h 01h 02h... 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h POST Routine Description Test CMOS R/W functionality Early chipset initialization T Disable shadow RAM T Disable L2 cache (socket 7 or below) T Program basic chipset registers Detect memory T Auto-detection of DRAM size, type, and ECC T Auto-...
... interface swap (optional) 3 Reset keyboard for Winbond 977 series Super I/O chops Reserved Reserved Reserved Test F000h segment shadow to E000 and F000 shadow RAM Expand the X group codes locating in F000 for keyboard and mouse followed by functions. POST Code (Hex) CFh C0h C1h C3h C5h 01h 02h... 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h POST Routine Description Test CMOS R/W functionality Early chipset initialization T Disable shadow RAM T Disable L2 cache (socket 7 or below) T Program basic chipset registers Detect memory T Auto-detection of DRAM size, type, and ECC T Auto-...
Aspire X1200 / X3200 Service Guide
Page 95
... DVD+R( DL) 2.4x , 4x CLV DVD+RW 2.4x, 4x, 6x CLV, 8x ZCLV CD-R 10x CLV, 16x CLV CD-RW 4x, 10x, 16x CLV DVD-RAM 5x PCAV DVD+R( DL) 4x CLV DVD+RW 8x ZCLV DVD+R 16x PCAV DVD-R( DL) 4x CLV DVD-RW 6x CLV DVD-R 16x PCAV CD...
... DVD+R( DL) 2.4x , 4x CLV DVD+RW 2.4x, 4x, 6x CLV, 8x ZCLV CD-R 10x CLV, 16x CLV CD-RW 4x, 10x, 16x CLV DVD-RAM 5x PCAV DVD+R( DL) 4x CLV DVD+RW 8x ZCLV DVD+R 16x PCAV DVD-R( DL) 4x CLV DVD-RW 6x CLV DVD-R 16x PCAV CD...
Aspire X1200 / X3200 Service Guide
Page 96
... 198KB with buffer under run prevention technology Serial ATA PLDS DH-16D2S DVD-ROM - CD 12 ms DVD 140 ms DVD-RAM 150 ms 198 KB Serial ATA Appendix A 88 CD-RAm 5x CD Max 48x DVD Max 16x - CD: 48x max. - DVD: 160 ms CD: 140 ms - Serial ATA Specification HLDS...
... 198KB with buffer under run prevention technology Serial ATA PLDS DH-16D2S DVD-ROM - CD 12 ms DVD 140 ms DVD-RAM 150 ms 198 KB Serial ATA Appendix A 88 CD-RAm 5x CD Max 48x DVD Max 16x - CD: 48x max. - DVD: 160 ms CD: 140 ms - Serial ATA Specification HLDS...