Intel X6800 - Core 2 Extreme 2.9 GHz 4M L2 Cache LGA775 Dual-Core Processor Support and Manuals
Get Help and Manuals for this Intel item
Intel X6800 Videos
Intel Core 2 Duo Extreme x6800 2.93 ghz 320 GB 4 GB Windows 7 DVD
Duration: 2:54
Total Views: 3,268
Duration: 2:54
Total Views: 3,268
INTEL CORE 2 EXTREME X6800 CPU 2.93G ???CPU
Duration: 1:32
Total Views: 175
Duration: 1:32
Total Views: 175
Popular Intel X6800 Manual Pages
Specification Update - Page 13
... May Not be Set for Non-Single-Step #DB Exception
Intel® Core™2 Extreme Processor X6800 and
Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence
13
Specification Update AI60 X X X X X No Fix MOV To/From Debug Registers Causes Debug Exception
AI61 X X X X
Fixed
Debug Register May Contain Incorrect Information on a MOVSS or POPSS Instruction Followed by SYSRET...
Specification Update - Page 14
... be Incorrect after Shutdown
AI94 X X X X
Fixed
Performance Monitoring Counter MACRO_INSTS.DECODED May Not Count Some Decoded Instructions
AI95 X X X X
Fixed
The Stack Size May be Incorrect as a Result of VIP/VIF Check on SYSEXIT and SYSRET
14
Intel® Core™2 Extreme Processor X6800 and
Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence
Specification Update
Specification Update - Page 16
...Specification Changes in this Specification Update revision.
§
16
Intel® Core™2 Extreme Processor X6800 and
Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence
Specification Update... Error Reporting Enable Correctly
AI124 X
X
X
X
X
No Fix
RSM Instruction Execution under Certain Conditions May Cause Processor Hang or Unexpected Instruction Execution...
Specification Update - Page 17
... Information
Identification Information
Figure 1. Intel® Core™2 Duo Desktop Processor 2M SKU Package with 1066 MHz FSB
INTEL M ©'05 INTEL® CORE™2 DUO 6400 SLxxx [COO] 2.13GHZ/2M/1066/06 [FPO] e4
ATPO S/N
Intel® Core™2 Extreme Processor X6800 and
Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence
17
Specification Update
Specification Update - Page 20
... the generation field of 8W
20
Intel® Core™2 Extreme Processor X6800 and
Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence
Specification Update The Family corresponds to the Intel Processor Identification and the CPUID Instruction Application Note (AP-485)
and the Conroe and Woodcrest Processor Family BIOS Writer's Guide (BWG) for further
information on...
Specification Update - Page 21
... 12, 13, 15
775-land LGA
1, 3, 4, 6, 7, 8, 9, 10, 11, 12, 13, 16
Intel® Core™2 Extreme Processor X6800 and
Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence
21
Specification Update Intel® Core™2 Duo Desktop Processor 2M SKU Identification Information
S-Spec
Core Stepping
L2 Cache Size
(bytes)
Processor Signature
Processor Number
SL9SA
B2
2M...
Specification Update - Page 22
... Information
S-Spec
Core Stepping
L2 Cache Size
(bytes)
Processor Signature
Processor Number
SL9S5
B2
4M
06F6h
X6800
Speed Core/Bus
2.93 GHz / 1066 MHz
Package 775-land LGA
Notes
2, 3, 4, 6, 7, 8, 9, 10, 11, 12, 13, 15
22
Intel® Core™2 Extreme Processor X6800 and
Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence
Specification Update
Specification Update - Page 23
...interrupt may be left set . Status:
For the steppings affected, see the Summary Tables of Changes.
Intel® Core™2 Extreme Processor X6800 and
Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence
23
Specification Update LOCK# Asserted During a Special Cycle Shutdown Transaction May Unexpectedly De-assert
Problem:
During a processor shutdown transaction...
Specification Update - Page 25
... Tables of a #GP fault. Implication: Software may be serviced before higher priority interrupts. AI8.
Workaround: None identified.
Intel® Core™2 Extreme Processor X6800 and
Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence
25
Specification Update General Protection Fault (#GP) for Instructions Greater than 15 bytes in lieu of Changes. Page Fault...
Specification Update - Page 26
...
Intel® Core™2 Extreme Processor X6800 and
Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence
Specification Update Programming the Digital Thermal Sensor (DTS) Threshold May Cause Unexpected Thermal Interrupts
Problem:
Software can be incorrectly handled as follows:
• #DB is known to not be impacted by programming the thermal threshold and setting...
Specification Update - Page 37
...Workaround: It is enabled. Intel® Core™2 Extreme Processor X6800 and
Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence
37
Specification Update
PREFETCHh Instructions May Not be Executed when Alignment Check (AC) is Enabled
Problem:
PREFETCHT0, PREFETCHT1, PREFETCHT2 and PREFETCHNTA instructions may not be set . • An FXSAVE instruction is in 64-bit...
Specification Update - Page 40
...'s Manual, the use of the potential incorrect debug event signaling created by an instruction that signals a floating point exception rather than a MOV [r/e]SP, [r/e]BP instruction. Workaround: As recommended in incorrect signaling of Changes.
40
Intel® Core™2 Extreme Processor X6800 and
Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence
Specification Update...
Specification Update - Page 46
... from CPL3 code to VMLAUNCH/VMRESUME and after VM-exit may not fail if the value of Changes.
46
Intel® Core™2 Extreme Processor X6800 and
Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence
Specification Update
IRET under the conditions given above, an IRET can occur if the EFLAGS value on the IRET instruction even though...
Specification Update - Page 50
... Situation may cause the Processor to Hang
Problem:
During a series of REP (repeat) store instructions a store may try to dispatch to memory prior to the actual completion of Changes.
50
Intel® Core™2 Extreme Processor X6800 and
Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence
Specification Update Implication: When this erratum.
AI80. Implication...
Specification Update - Page 51
... available software. Errata
AI81.
AI83.
Due to WT memory aliasing may
Intel® Core™2 Extreme Processor X6800 and
Intel® Core™2 Duo Desktop Processor E6000 and E4000 Sequence
51
Specification Update Workaround: Do not use TPR shadow" VM-execution control is used to 1, a MOV instruction from CR8 Register with a 16 bit operand size (REX.W =0 and 66H...
Intel X6800 Reviews
We have not received any reviews for Intel yet.