Product Specification
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...Down (VRD 15 3.1.2 3.2 3.2.1 Reset Configuration Logic 15 Intel® 3200/3210 Chipset 16 Intel® 3200/3210 Chipset MCH: Memory Control Hub 16 3.2.2 3.2.3 PCI-X Hub (LX board SKU only 19 Intel® ICH9R: I/O Controller Hub 9R 20 3.3 Memory Sub-System 26 3.3.1 Memory Configuration 26 3.3.2 Memory DIMM Support 28 3.4 I/O Sub-System ...28 3.4.1 PCI ... 39 3.10 GigE PHY ...39 3.11 On-Board Components 39 3.11.1 Video Support ...39 3.12 Replacing the Back-Up Battery 42 4. Intel® Server Boards S3200SH/S3210SH TPS Table of Contents Table of Contents 1.
...Down (VRD 15 3.1.2 3.2 3.2.1 Reset Configuration Logic 15 Intel® 3200/3210 Chipset 16 Intel® 3200/3210 Chipset MCH: Memory Control Hub 16 3.2.2 3.2.3 PCI-X Hub (LX board SKU only 19 Intel® ICH9R: I/O Controller Hub 9R 20 3.3 Memory Sub-System 26 3.3.1 Memory Configuration 26 3.3.2 Memory DIMM Support 28 3.4 I/O Sub-System ...28 3.4.1 PCI ... 39 3.10 GigE PHY ...39 3.11 On-Board Components 39 3.11.1 Video Support ...39 3.12 Replacing the Back-Up Battery 42 4. Intel® Server Boards S3200SH/S3210SH TPS Table of Contents Table of Contents 1.
Product Specification
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... - PCI Configuration Screen Display 60 Figure 21. Boot Options Screen Display 66 Figure 26. Intel® Server Board S3210SHLC 10 Figure 5. Intel® Server Boards S3210SHLC/S3200SHL/S3200SHV - Intel® Server Systems S3200SH/S3210SH LX SKU-Block Diagram 14 Figure 9. Memory Bank Label Definition 27 Figure 10. PXH-V Interrupt Routing Diagram 35 Figure 13. ATA...
... - PCI Configuration Screen Display 60 Figure 21. Boot Options Screen Display 66 Figure 26. Intel® Server Board S3210SHLC 10 Figure 5. Intel® Server Boards S3210SHLC/S3200SHL/S3200SHV - Intel® Server Systems S3200SH/S3210SH LX SKU-Block Diagram 14 Figure 9. Memory Bank Label Definition 27 Figure 10. PXH-V Interrupt Routing Diagram 35 Figure 13. ATA...
Product Specification
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...Console Redirection Configuration Fields 64 Table 31. SPI Required Command Codes 23 Table 10. Characteristics of Tables Table 1. Setup Utility - Memory Configuration Screen Fields 53 Table 24. Setup Utility - BIOS Setup Page Layout 45 Table 19. ATA Controller Configuration Screen Fields ...56 Table 25. Setup Utility - Supported DDR2 Modules 18 Table 6. Setup Utility - Intel® Server Boards S3200SH/S3210SH TPS List of Tables List of Dual/Single Channel Configuration with or without Dynamic Mode28 Table 12...
...Console Redirection Configuration Fields 64 Table 31. SPI Required Command Codes 23 Table 10. Characteristics of Tables Table 1. Setup Utility - Memory Configuration Screen Fields 53 Table 24. Setup Utility - BIOS Setup Page Layout 45 Table 19. ATA Controller Configuration Screen Fields ...56 Table 25. Setup Utility - Supported DDR2 Modules 18 Table 6. Setup Utility - Intel® Server Boards S3200SH/S3210SH TPS List of Tables List of Dual/Single Channel Configuration with or without Dynamic Mode28 Table 12...
Product Specification
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...chipset (If a VGA adapter is inserted into this slot, the VGA card will only work at PCI Express* x1 speed; Server Board Overview Intel® Server Boards S3200SH/S3210SH TPS 2. this is a chipset limitation.) o One PCI Express* x8 connector routed to be used as a x16 link from the ICH9R...Chipset Supports processors in LGA775 package 800/1066/1333 MHz Front Side Bus (FSB) speed Four DDR2 667/800MHz unbuffered DIMM memory sockets with or without ECC Supports the Intel® ICH9R I/O Controller, interfaced with MCH via DMI LX board SKU supports the following I/O slots: o One PCI Express...
...chipset (If a VGA adapter is inserted into this slot, the VGA card will only work at PCI Express* x1 speed; Server Board Overview Intel® Server Boards S3200SH/S3210SH TPS 2. this is a chipset limitation.) o One PCI Express* x8 connector routed to be used as a x16 link from the ICH9R...Chipset Supports processors in LGA775 package 800/1066/1333 MHz Front Side Bus (FSB) speed Four DDR2 667/800MHz unbuffered DIMM memory sockets with or without ECC Supports the Intel® ICH9R I/O Controller, interfaced with MCH via DMI LX board SKU supports the following I/O slots: o One PCI Express...
Product Specification
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... o Supports Intel® Extended Memory System 64 Technology (Intel® EM64T) Intel® 3200/3210 Chipset components o Intel® 3200/3210 Memory Controller Hub (MCH) o Intel® ICH9R I /O Subsystem Clock o CK-505 compliant System Clock Generator Revision 1.8 3 Intel Order Number: E14960-009 The server board does not support DDR2-533 DIMMs. 2. Intel® Server Boards S3200SH/S3210SH TPS...
... o Supports Intel® Extended Memory System 64 Technology (Intel® EM64T) Intel® 3200/3210 Chipset components o Intel® 3200/3210 Memory Controller Hub (MCH) o Intel® ICH9R I /O Subsystem Clock o CK-505 compliant System Clock Generator Revision 1.8 3 Intel Order Number: E14960-009 The server board does not support DDR2-533 DIMMs. 2. Intel® Server Boards S3200SH/S3210SH TPS...
Product Specification
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...131; 1.8 V AUX, 1.2 V AUX, and 0.9 V AUX for Integrated BMC and the DDR2 memory supporting it 4 Revision 1.8 Intel Order Number: E14960-009 Server Board Overview Intel® Server Boards S3200SH/S3210SH TPS Video ServerEngines* Integrated BMC (Baseboard management controller) External 32 ...MB (or greater) DDR2 533 MHz memory VGA Video external connector ...
...131; 1.8 V AUX, 1.2 V AUX, and 0.9 V AUX for Integrated BMC and the DDR2 memory supporting it 4 Revision 1.8 Intel Order Number: E14960-009 Server Board Overview Intel® Server Boards S3200SH/S3210SH TPS Video ServerEngines* Integrated BMC (Baseboard management controller) External 32 ...MB (or greater) DDR2 533 MHz memory VGA Video external connector ...
Product Specification
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... of three primary components. 3.2.1 Intel® 3200/3210 Chipset MCH: Memory Control Hub The Intel® 3200/3210 Chipset is designed around the Intel® 3200/3210 Chipset. Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS Process Name Intel® Xeon® processor 3000 series Intel® Xeon® processor 3100 series Intel® Xeon® processor 3200...
... of three primary components. 3.2.1 Intel® 3200/3210 Chipset MCH: Memory Control Hub The Intel® 3200/3210 Chipset is designed around the Intel® 3200/3210 Chipset. Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS Process Name Intel® Xeon® processor 3000 series Intel® Xeon® processor 3100 series Intel® Xeon® processor 3200...
Product Specification
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... Twelve deep in cards or cards through the I/O riser when using the riser slot for 512 MB, 1 GB, and 2 GB DDR2 memory modules 3.2.1.1 Segment F PCI Express* x8 The MCH PCI Express* Lanes 0~7 provide an x8 PCI Express* connection directly to the MCH. Segment ...F Connections Revision 1.8 17 Intel Order Number: E14960-009 The MCH is responsible for each request. Table 4. Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture o Interface to ICH9R South Bridge o 100 MHz reference clock shared ...
... Twelve deep in cards or cards through the I/O riser when using the riser slot for 512 MB, 1 GB, and 2 GB DDR2 memory modules 3.2.1.1 Segment F PCI Express* x8 The MCH PCI Express* Lanes 0~7 provide an x8 PCI Express* connection directly to the MCH. Segment ...F Connections Revision 1.8 17 Intel Order Number: E14960-009 The MCH is responsible for each request. Table 4. Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture o Interface to ICH9R South Bridge o 100 MHz reference clock shared ...
Product Specification
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... needed, you must follow a few rules when populating memory. The memory interface supports a 72-bit wide memory array. Functional Architecture Lane Lane 0~7 Intel® Server Boards S3200SH/S3210SH TPS Device Slot 6 (PCI Express* x16 with 8 Lanes layout) 3.2.1.2 MCH Memory Sub-System Overview The MCH supports a 72-bit wide memory sub-system that can be any industry-standard...
... needed, you must follow a few rules when populating memory. The memory interface supports a 72-bit wide memory array. Functional Architecture Lane Lane 0~7 Intel® Server Boards S3200SH/S3210SH TPS Device Slot 6 (PCI Express* x16 with 8 Lanes layout) 3.2.1.2 MCH Memory Sub-System Overview The MCH supports a 72-bit wide memory sub-system that can be any industry-standard...
Product Specification
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... to one riser slot. This PCI-X segment (segment E) provides the following table shows the bit to which acts as the total memory in each IDSEL signal is attached for PCI access using resources supplied by the PXH-V. The host bridge PCI interface (PXH-V) arbitration ...the same channel) may be populated in configuration cycles. IDSEL Value 18 17 Table 6. Table 7. Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture Supports ECC or non-ECC DIMMs. Different memory technologies (size and density) can be used. Single Channel Mode (either 32 or 64...
... to one riser slot. This PCI-X segment (segment E) provides the following table shows the bit to which acts as the total memory in each IDSEL signal is attached for PCI access using resources supplied by the PXH-V. The host bridge PCI interface (PXH-V) arbitration ...the same channel) may be populated in configuration cycles. IDSEL Value 18 17 Table 6. Table 7. Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture Supports ECC or non-ECC DIMMs. Different memory technologies (size and density) can be used. Single Channel Mode (either 32 or 64...
Product Specification
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.... The x4 configuration supports lane reversal. a legacy mode using I/O space and an Advanced Host Controller Interface (AHCI) mode using memory space. 3.2.3.5 PCI Interface The Intel® ICH9 PCI interface provides a 33 MHz, 3.3 V, Revision 2.3 implementation. The server board supports one NIC, the 82541PI ...specifications are used as four x 1 ports, or ganged together to form two x 2 ports, one x4 port. Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS Baseboard Signals PCIX REQ_N1/GNT_N1 PCIX REQ_N0/GNT_N0 Device PCI-X Slot 1 (64-bit/66-133 MHz) (LX board...
.... The x4 configuration supports lane reversal. a legacy mode using I/O space and an Advanced Host Controller Interface (AHCI) mode using memory space. 3.2.3.5 PCI Interface The Intel® ICH9 PCI interface provides a 33 MHz, 3.3 V, Revision 2.3 implementation. The server board supports one NIC, the 82541PI ...specifications are used as four x 1 ports, or ganged together to form two x 2 ports, one x4 port. Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS Baseboard Signals PCIX REQ_N1/GNT_N1 PCIX REQ_N0/GNT_N0 Device PCI-X Slot 1 (64-bit/66-133 MHz) (LX board...
Product Specification
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... be directed to the Manageability Engine and the Host system. Table 8. For example, an address of FFFFFFFFh simply aliases to the top of the flash memory. Supports SPI Compatibility Mode 0. Receipt of 16 Mb (BIOS + Gbe). To disable write protection, power up in an ... Cycles Routed to LPC (Test only) The SPI flash meets the following requirements: Erase size capability of the PWROK input. Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture When SPI is selected by the Boot BIOS Destination Strap and a SPI Device is detected by the ICH9 at ...
... be directed to the Manageability Engine and the Host system. Table 8. For example, an address of FFFFFFFFh simply aliases to the top of the flash memory. Supports SPI Compatibility Mode 0. Receipt of 16 Mb (BIOS + Gbe). To disable write protection, power up in an ... Cycles Routed to LPC (Test only) The SPI flash meets the following requirements: Erase size capability of the PWROK input. Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture When SPI is selected by the Boot BIOS Destination Strap and a SPI Device is detected by the ICH9 at ...
Product Specification
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...from lockups without the use of sockets. 3.2.3.15 Manageability The Intel® ICH9 integrates several functions designed to 3.6 V serial interface FLASH memory, Intel part number D64145-001/D64145-002. Intel® High Definition Audio 3. The SPI Flash Memory device is an Atmel AT26DF321*, 32-mbit, 2.7 to ... E14960-009 The management engine includes the following interfaces in Standard JESD21-C, PRN03-NV1. Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS Commands Program Data Read Data Write Disable Read Status Write Enable Fast Read Enable Write ...
...from lockups without the use of sockets. 3.2.3.15 Manageability The Intel® ICH9 integrates several functions designed to 3.6 V serial interface FLASH memory, Intel part number D64145-001/D64145-002. Intel® High Definition Audio 3. The SPI Flash Memory device is an Atmel AT26DF321*, 32-mbit, 2.7 to ... E14960-009 The management engine includes the following interfaces in Standard JESD21-C, PRN03-NV1. Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS Commands Program Data Read Data Write Disable Read Status Write Enable Fast Read Enable Write ...
Product Specification
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...by cabling from an internal 9-pin connector located on the server board to four USB connectors. The USB controller moves data between main memory and up to handle 15 interrupts. The third/fourth USB port is optional and can be configured as segment A. The PCI Express...the same bandwidth. The server board supports sleep states S1, S4, and S5. Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture 3.2.3.17 PCI Express* x4 Sub-system The Intel® ICH9R supports one embedded Intel® 82541PI LAN controller. The dual-stack USB connector is located within the standard...
...by cabling from an internal 9-pin connector located on the server board to four USB connectors. The USB controller moves data between main memory and up to handle 15 interrupts. The third/fourth USB port is optional and can be configured as segment A. The PCI Express...the same bandwidth. The server board supports sleep states S1, S4, and S5. Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture 3.2.3.17 PCI Express* x4 Sub-system The Intel® ICH9R supports one embedded Intel® 82541PI LAN controller. The dual-stack USB connector is located within the standard...
Product Specification
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... socket identifiers are marked on the server board. Bank 2 contains DIMM socket locations DIMM_1B and DIMM_2B. Bank 1 is associated with Memory Channel A while Bank 2 is a 72-bit (ECC) wide interface. This configuration is x72, which includes eight ECC check...; Interface: SSTL2 26 Revision 1.8 Intel Order Number: E14960-009 Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS 3.3 Memory Sub-System The server board supports up to four DIMM slots for a maximum memory capacity of DIMMs, labeled 1 and 2. DIMM and memory configurations must adhere to the following ...
... socket identifiers are marked on the server board. Bank 2 contains DIMM socket locations DIMM_1B and DIMM_2B. Bank 1 is associated with Memory Channel A while Bank 2 is a 72-bit (ECC) wide interface. This configuration is x72, which includes eight ECC check...; Interface: SSTL2 26 Revision 1.8 Intel Order Number: E14960-009 Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS 3.3 Memory Sub-System The server board supports up to four DIMM slots for a maximum memory capacity of DIMMs, labeled 1 and 2. DIMM and memory configurations must adhere to the following ...
Product Specification
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Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS Table 11. Characteristics of the three PCI bus segments. 28 Revision 1.8 Intel Order Number: E14960-009 Therefore, the minimum main memory configuration is 512 MB. The largest size DIMM supported is 2 GB and as such, the maximum main memory configuration is... (not registered) DDR2 667/800 ECC or non-ECC DIMMs operating at 667/800 MT/s. All DIMMs are supported by Intel or a designated memory test vendor are supported on this board. Note: Only DIMMs tested and qualified by design, but only fully qualified DIMMs...
Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS Table 11. Characteristics of the three PCI bus segments. 28 Revision 1.8 Intel Order Number: E14960-009 Therefore, the minimum main memory configuration is 512 MB. The largest size DIMM supported is 2 GB and as such, the maximum main memory configuration is... (not registered) DDR2 667/800 ECC or non-ECC DIMMs operating at 667/800 MT/s. All DIMMs are supported by Intel or a designated memory test vendor are supported on this board. Note: Only DIMMs tested and qualified by design, but only fully qualified DIMMs...
Product Specification
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Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS 3.5 BMC Controller The Integrated Baseboard Management Controller (...; SPI Flash interface Three UART for ICMB support DDR2 16-bit up to 667 MHz memory interface 16 Mailbox Registers for communication between the host and the BMC Watchdog timer ...; 12 10-bit Analog to Digital Converters Three Diode Inputs for Temperature measurements 36 Revision 1.8 Intel Order Number: E14960-009 The Integrated BMC contains the following integrated subsystems and features. The Integrated BMC is...
Functional Architecture Intel® Server Boards S3200SH/S3210SH TPS 3.5 BMC Controller The Integrated Baseboard Management Controller (...; SPI Flash interface Three UART for ICMB support DDR2 16-bit up to 667 MHz memory interface 16 Mailbox Registers for communication between the host and the BMC Watchdog timer ...; 12 10-bit Analog to Digital Converters Three Diode Inputs for Temperature measurements 36 Revision 1.8 Intel Order Number: E14960-009 The Integrated BMC contains the following integrated subsystems and features. The Integrated BMC is...
Product Specification
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Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture Eight Fan Tach ... speed Integrated 24-bit RAMDAC Single lane PCI Express* host interface Integrated BMC Block Diagram USB to Host Code Memory LPC Interface To Host ARM926EJ-S 16K D & I Cache Interrupt Controller RTC & General Purpose TImers (3) Fan Tach (12... USB 2.0 Ethernet MAC with RMII (2) Crypto Accelerator LPC Master, JTAG Master, & SPI FLash DDR-II 16-bit Memory Controller UART (3) GPIO KCS BT & Mailboxes System Wakeup Control LPC Interface LPC to SPI Flash Bridge Watchdog Timer BMC ...
Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture Eight Fan Tach ... speed Integrated 24-bit RAMDAC Single lane PCI Express* host interface Integrated BMC Block Diagram USB to Host Code Memory LPC Interface To Host ARM926EJ-S 16K D & I Cache Interrupt Controller RTC & General Purpose TImers (3) Fan Tach (12... USB 2.0 Ethernet MAC with RMII (2) Crypto Accelerator LPC Master, JTAG Master, & SPI FLash DDR-II 16-bit Memory Controller UART (3) GPIO KCS BT & Mailboxes System Wakeup Control LPC Interface LPC to SPI Flash Bridge Watchdog Timer BMC ...
Product Specification
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...The video Revision 1.8 39 Intel Order Number: E14960-009 one transmit pair and one reset/sync. In sleeping states S3 - The graphics subsystem has 8 MB memory to be dynamically controlled based on the link speed. Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture ...3.9 GigE Controller 82541PI The Intel® 82541 Gigabit Ethernet Controller is a single, compact component ...
...The video Revision 1.8 39 Intel Order Number: E14960-009 one transmit pair and one reset/sync. In sleeping states S3 - The graphics subsystem has 8 MB memory to be dynamically controlled based on the link speed. Intel® Server Boards S3200SH/S3210SH TPS Functional Architecture ...3.9 GigE Controller 82541PI The Intel® 82541 Gigabit Ethernet Controller is a single, compact component ...
Product Specification
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...platform setup. 4.3.1 Operation BIOS Setup has the following information BIOS ID Total memory detected (total size of all installed DIMMs) Processor information (Intel branded string, speed, and number of physical processors identified) Types of input devices (... diagnostic screen consists of the following features: Localization. In quiet boot mode, a logo splash screen displays. Intel® Server Boards S3200SH/S3210SH TPS System BIOS 4.2 Logo / Diagnostic Window The logo / diagnostic window may limit some functionality for compatibility (for...
...platform setup. 4.3.1 Operation BIOS Setup has the following information BIOS ID Total memory detected (total size of all installed DIMMs) Processor information (Intel branded string, speed, and number of physical processors identified) Types of input devices (... diagnostic screen consists of the following features: Localization. In quiet boot mode, a logo splash screen displays. Intel® Server Boards S3200SH/S3210SH TPS System BIOS 4.2 Logo / Diagnostic Window The logo / diagnostic window may limit some functionality for compatibility (for...