English manual
Page 36
...Active RAS Displays the number of clock cycles taken between successive active commands to the actual memory location until the data is allocated during driver initialization. The DRAM row precharge time is in clock cycles) between the CAS and RAS strobe signals. ► Row Precharge Time... This item shows the number of clock cycles taken between issuing of available resources for use as video memory to its submenu. ► CAS Latency This item shows the CAS latency. Advanced Chipset Features �N��o�r�t...
...Active RAS Displays the number of clock cycles taken between successive active commands to the actual memory location until the data is allocated during driver initialization. The DRAM row precharge time is in clock cycles) between the CAS and RAS strobe signals. ► Row Precharge Time... This item shows the number of clock cycles taken between issuing of available resources for use as video memory to its submenu. ► CAS Latency This item shows the CAS latency. Advanced Chipset Features �N��o�r�t...