Design Guide
Page 124
...the minimum current path loop area. (The parallel ground trace will have been observed at the pad violates the following noise sources: • Motherboard coupling • VTT noise • VREF noise Ringback Levels The example topology covered in this implies a 2/3 VTT (VREF) range from ...- 200 mV) for a low-to VREF. The VREF Guardband region is specified with a small timing error penalty. The Intel®Pentium® II Processor Developer's Manual states that may affect the way an AGTL+ signal becomes valid at a receiver, from the last crossing of the overdrive region...
...the minimum current path loop area. (The parallel ground trace will have been observed at the pad violates the following noise sources: • Motherboard coupling • VTT noise • VREF noise Ringback Levels The example topology covered in this implies a 2/3 VTT (VREF) range from ...- 200 mV) for a low-to VREF. The VREF Guardband region is specified with a small timing error penalty. The Intel®Pentium® II Processor Developer's Manual states that may affect the way an AGTL+ signal becomes valid at a receiver, from the last crossing of the overdrive region...