Product Guide
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Table 17. Intel Desktop Board DP55WG Product Guide Table 17 lists the Port 80h POST codes in hexadecimal notation. Port 80h POST ... caching Load BSP/APS microcode Platform program base addresses Wake up all APS Initialize NEM Pass entry point of the PEI core 11 12 13 14 15 16 17, 18 19, 1A 1B, 1C PEI Phase Before MRC Set bootmode, GPIO... driver SMBUS driver init Entry/Exit to SMBUS execute read/write Entry/Exit to CK505 programming Entry/Exit to PEI overclock programming MEC Memory Detection 21 MRC entry point 23 Reading SPD from memory DIMMs 24 Detecting presence of memory DIMMs...
Table 17. Intel Desktop Board DP55WG Product Guide Table 17 lists the Port 80h POST codes in hexadecimal notation. Port 80h POST ... caching Load BSP/APS microcode Platform program base addresses Wake up all APS Initialize NEM Pass entry point of the PEI core 11 12 13 14 15 16 17, 18 19, 1A 1B, 1C PEI Phase Before MRC Set bootmode, GPIO... driver SMBUS driver init Entry/Exit to SMBUS execute read/write Entry/Exit to CK505 programming Entry/Exit to PEI overclock programming MEC Memory Detection 21 MRC entry point 23 Reading SPD from memory DIMMs 24 Detecting presence of memory DIMMs...