Product Specification
Page 63
...-On Self-Test (POST) memory test begins and before the operating system boot begins. The BIOS Setup program is powered-up, the BIOS compares the CPU version and the microcode version in configure mode. Section 2.3 on page 54 shows how to view and change the BIOS settings for the computer. Maintenance...) and can be updated using a disk-based program. The BIOS displays a message during POST identifying the type of BIOS Features 3.1 Introduction The board uses an Intel BIOS that is stored in configure mode. 63
...-On Self-Test (POST) memory test begins and before the operating system boot begins. The BIOS Setup program is powered-up, the BIOS compares the CPU version and the microcode version in configure mode. Section 2.3 on page 54 shows how to view and change the BIOS settings for the computer. Maintenance...) and can be updated using a disk-based program. The BIOS displays a message during POST identifying the type of BIOS Features 3.1 Introduction The board uses an Intel BIOS that is stored in configure mode. 63
Product Specification
Page 75
.... Resuming from SX states. 0x10 - Security (SEC) phase PEI phase pre MRC execution MRC Memory detection PEI phase post MRC execution Recovery Platform DXE driver CPU Initialization (PEI, DXE, SMM) IO Buses: PCI, USB, ISA, ATA etc. 0x5F is useful for determining the point where an error occurred. Not that can...
.... Resuming from SX states. 0x10 - Security (SEC) phase PEI phase pre MRC execution MRC Memory detection PEI phase post MRC execution Recovery Platform DXE driver CPU Initialization (PEI, DXE, SMM) IO Buses: PCI, USB, ISA, ATA etc. 0x5F is useful for determining the point where an error occurred. Not that can...
Product Specification
Page 76
..., S2, S3, S4, or S5 state 0x10,0x20,0x30,0x40,0x50 Resuming from S2, S3, S4, S5 Security Phase (SEC) 0x08 Starting BIOS execution after CPU BIST 0x09 SPI prefetching and caching 0x0A Load BSP microcode 0x0B 0x0C Load APs microcodes Platform program baseaddresses 0x0D Wake Up All APs 0x0E Initialize... point 0x23 Reading SPD from memory DIMMs 0x24 0x27 Detecting presence of memory DIMMs Configuring memory 0x28 Testing memory 0x29 Exit MRC driver continued 76 Intel Desktop Board DH67GD and Intel Desktop Board DH67BL Technical Product Specification Table 48.
..., S2, S3, S4, or S5 state 0x10,0x20,0x30,0x40,0x50 Resuming from S2, S3, S4, S5 Security Phase (SEC) 0x08 Starting BIOS execution after CPU BIST 0x09 SPI prefetching and caching 0x0A Load BSP microcode 0x0B 0x0C Load APs microcodes Platform program baseaddresses 0x0D Wake Up All APs 0x0E Initialize... point 0x23 Reading SPD from memory DIMMs 0x24 0x27 Detecting presence of memory DIMMs Configuring memory 0x28 Testing memory 0x29 Exit MRC driver continued 76 Intel Desktop Board DH67GD and Intel Desktop Board DH67BL Technical Product Specification Table 48.
Product Specification
Page 77
... 0x33 Loading recovery capsule 0x34 Start recovery capsule/ valid capsule is found CPU Initialization CPU PEI Phase 0x41 Begin CPU PEI Init 0x42 XMM instruction enabling 0x43 End CPU PEI Init CPU PEI SMM Phase 0x44 Begin CPU SMM Init smm relocate bases 0x45 Smm relocate bases for APs 0x46 End...if needed 0x4A Initialize strings to HII database 0x4B Initialize MP Support 0x4C CPU DXE Phase End CPU DXE SMM Phase 0x4D CPU DXE SMM Phase begin 0x4E Relocate SM bases for all APs 0x4F CPU DXE SMM Phase end IO BUSES 0x50 Enumerating PCI buses 0x51 Allocating resources...
... 0x33 Loading recovery capsule 0x34 Start recovery capsule/ valid capsule is found CPU Initialization CPU PEI Phase 0x41 Begin CPU PEI Init 0x42 XMM instruction enabling 0x43 End CPU PEI Init CPU PEI SMM Phase 0x44 Begin CPU SMM Init smm relocate bases 0x45 Smm relocate bases for APs 0x46 End...if needed 0x4A Initialize strings to HII database 0x4B Initialize MP Support 0x4C CPU DXE Phase End CPU DXE SMM Phase 0x4D CPU DXE SMM Phase begin 0x4E Relocate SM bases for all APs 0x4F CPU DXE SMM Phase end IO BUSES 0x50 Enumerating PCI buses 0x51 Allocating resources...
Product Specification
Page 89
... Boards: E210882. Taiwan BSMI (Bureau of the mark may vary depending upon the application. Consists of the symbol used on Intel Desktop Boards and associated collateral. Includes adjacent KCC certification number: CPU-DH67GD (B). Australian Communications Authority (ACA) and New Zealand Radio Spectrum Management (NZ RSM) C-tick mark. The Environmental Friendly Usage Period (EFUP...
... Boards: E210882. Taiwan BSMI (Bureau of the mark may vary depending upon the application. Consists of the symbol used on Intel Desktop Boards and associated collateral. Includes adjacent KCC certification number: CPU-DH67GD (B). Australian Communications Authority (ACA) and New Zealand Radio Spectrum Management (NZ RSM) C-tick mark. The Environmental Friendly Usage Period (EFUP...
English Product Guide
Page 76
...Environmental Friendly Usage Period (EFUP) for Interference) mark. Table 21. CE mark. Intel Desktop Board DH67GD Product Guide Product Certifications Board-Level Certifications Intel Desktop Board DH67GD has the regulatory compliance marks shown in Table 21. Printed wiring board manufacturer's ...recognition mark. Declaring compliance to be 10 years. 76 Includes adjacent Intel supplier code number, N-232. Includes adjacent KCC certification number: CPU-DH67GD (B). Consists of the mark may vary depending upon the application. Regulatory Compliance Marks...
...Environmental Friendly Usage Period (EFUP) for Interference) mark. Table 21. CE mark. Intel Desktop Board DH67GD Product Guide Product Certifications Board-Level Certifications Intel Desktop Board DH67GD has the regulatory compliance marks shown in Table 21. Printed wiring board manufacturer's ...recognition mark. Declaring compliance to be 10 years. 76 Includes adjacent Intel supplier code number, N-232. Includes adjacent KCC certification number: CPU-DH67GD (B). Consists of the mark may vary depending upon the application. Regulatory Compliance Marks...