Product Specification
Page 44
... J1G1, J1F2, J1H1, J1G2, J1J1, J1H2 J1J2, J1J7, J2H1, J1J5 J1J3 J2J1 J4J1 J2J3 Main power CPU power P/S aux/IPMB P12V4 power CPU sockets DIMM sockets Card edge Card edge Card edge Key holder Shrouded header Header Header Header Battery holder PS2, stacked External LAN builtin...Header Header Header Header Header Header 24 8 5 4 771 240 3 40 6 4 4 3 12 22 3 jacks 4 9 10 24 10 4 2 7 4 3 4 3 2 Revision 1.5 35 Intel order number: D66403-006 Connector/Header Locations and Pin-outs 5.1 Board Connector Information The following table lists all connectors, headers and jumpers on the silkscreen...
... J1G1, J1F2, J1H1, J1G2, J1J1, J1H2 J1J2, J1J7, J2H1, J1J5 J1J3 J2J1 J4J1 J2J3 Main power CPU power P/S aux/IPMB P12V4 power CPU sockets DIMM sockets Card edge Card edge Card edge Key holder Shrouded header Header Header Header Battery holder PS2, stacked External LAN builtin...Header Header Header Header Header Header 24 8 5 4 771 240 3 40 6 4 4 3 12 22 3 jacks 4 9 10 24 10 4 2 7 4 3 4 3 2 Revision 1.5 35 Intel order number: D66403-006 Connector/Header Locations and Pin-outs 5.1 Board Connector Information The following table lists all connectors, headers and jumpers on the silkscreen...
Product Specification
Page 80
...use when the standard firmware update process fails. This workstation board does not support previous generation Intel® Xeon® processors. ƒ For the best performance, you must install processors in DIMM sockets A1, B1, C1, and D1. In a four-DIMM configuration, FBDIMMs should be ...set to the "enabled" position (pins 2-3). CPU 1 is re-applied. You should never run before performing the CMOS Clear operation...
...use when the standard firmware update process fails. This workstation board does not support previous generation Intel® Xeon® processors. ƒ For the best performance, you must install processors in DIMM sockets A1, B1, C1, and D1. In a four-DIMM configuration, FBDIMMs should be ...set to the "enabled" position (pins 2-3). CPU 1 is re-applied. You should never run before performing the CMOS Clear operation...
