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...interrupt system management mode system management RAM serial presence detect standard parallel port static RAM Streaming SIMD extensions super twist pneumatic super VGA software telephone answering device Temperature-sensing And Fan control Integrated circuit telephone answering machine tape carrier package trap flag thin-film transistor Telecommunications ... adapter vibrato very large scale integration Video RAM watt Wake on LAN Windows RAM zero flag zero insertion force (socket) Compaq iPAQ Family of Internet Devices 1-7 First Edition - March 2000 Technical Reference Guide Table 1-1.
...interrupt system management mode system management RAM serial presence detect standard parallel port static RAM Streaming SIMD extensions super twist pneumatic super VGA software telephone answering device Temperature-sensing And Fan control Integrated circuit telephone answering machine tape carrier package trap flag thin-film transistor Telecommunications ... adapter vibrato very large scale integration Video RAM watt Wake on LAN Windows RAM zero flag zero insertion force (socket) Compaq iPAQ Family of Internet Devices 1-7 First Edition - March 2000 Technical Reference Guide Table 1-1.
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... speed. Also included are backward-compatible with software written for Compaq iPAQs. The Pentium III processor employed in these systems uses a Flip-Chip (FC) PGA370 package and heat sink. 2-10 Compaq iPAQ Family of secondary cache included on select systems...serial number function useful for multimedia applications. 2.4.1.1 Celeron Processor Select Compaq iPAQ systems use the Intel Celeron processor. Featuring .18-micron technology, the Pentium III processor features 256 kilobytes of Internet Devices First Edition - The Celeron processor provides economical performance and ...
... speed. Also included are backward-compatible with software written for Compaq iPAQs. The Pentium III processor employed in these systems uses a Flip-Chip (FC) PGA370 package and heat sink. 2-10 Compaq iPAQ Family of secondary cache included on select systems...serial number function useful for multimedia applications. 2.4.1.1 Celeron Processor Select Compaq iPAQ systems use the Intel Celeron processor. Featuring .18-micron technology, the Pentium III processor features 256 kilobytes of Internet Devices First Edition - The Celeron processor provides economical performance and ...
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...Processor Internal Architecture The Celeron processor is configured as 90 percent of the CPU's execution time. The MMX support provided by the Celeron consists of Internet Devices First Edition - Such applications often involve computing-intensive loops that can take up as much as either a Celeron-based or Pentium III-...uses a dual-ALU CPU with branch prediction and MMX support, floating point unit (FPU) for accelerating multimedia communications applications. Chapter 3 Processor/Memory Subsystem 3.2 PROCESSOR The Compaq iPAQ is software-compatible with a Celeron 500 installed.
...Processor Internal Architecture The Celeron processor is configured as 90 percent of the CPU's execution time. The MMX support provided by the Celeron consists of Internet Devices First Edition - Such applications often involve computing-intensive loops that can take up as much as either a Celeron-based or Pentium III-...uses a dual-ALU CPU with branch prediction and MMX support, floating point unit (FPU) for accelerating multimedia communications applications. Chapter 3 Processor/Memory Subsystem 3.2 PROCESSOR The Compaq iPAQ is software-compatible with a Celeron 500 installed.
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... 133 MHz 100 MHz 133 MHz The Pentium III processor is software-compatible with ISV, OpenGL, and DirectX applications SSE support requires driver and Service Pack 4 (SP5 recommended) Compaq iPAQ Family of Internet Devices 3-3 First Edition - March 2000 Technical Reference Guide 3.2.2 ...Table 3-2. The Pentium III processor also features 70 FPU-based streaming SIMD extensions (SSE) that, when implemented by appropriate software, can enhance 3D transforming and speech processing operations. Pentium III Processor Internal Architecture Table 3-2. Operating system requirements for SSE ...
... 133 MHz 100 MHz 133 MHz The Pentium III processor is software-compatible with ISV, OpenGL, and DirectX applications SSE support requires driver and Service Pack 4 (SP5 recommended) Compaq iPAQ Family of Internet Devices 3-3 First Edition - March 2000 Technical Reference Guide 3.2.2 ...Table 3-2. The Pentium III processor also features 70 FPU-based streaming SIMD extensions (SSE) that, when implemented by appropriate software, can enhance 3D transforming and speech processing operations. Pentium III Processor Internal Architecture Table 3-2. Operating system requirements for SSE ...
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...memory, configuration, and special. Specifies config. March 2000 I /O and memory cycles, a standard 32-bit address decode (AD31..0) for byte-level addressing is handled by software. In burst mode, subsequent data phases are completed using autoincremented addressing. Address decoding is employed. reg. 1,0 Configuration Cycle Type ID. 00 = Type 0 01 = .....0 Configuration Data. Selects PCI bus 15..11 PCI Device Number. Selects PCI device for handling both address and data transfers. Compaq iPAQ Family of that allows configuration of Internet Devices 4-3 First Edition -
...memory, configuration, and special. Specifies config. March 2000 I /O and memory cycles, a standard 32-bit address decode (AD31..0) for byte-level addressing is handled by software. In burst mode, subsequent data phases are completed using autoincremented addressing. Address decoding is employed. reg. 1,0 Configuration Cycle Type ID. 00 = Type 0 01 = .....0 Configuration Data. Selects PCI bus 15..11 PCI Device Number. Selects PCI device for handling both address and data transfers. Compaq iPAQ Family of that allows configuration of Internet Devices 4-3 First Edition -
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.../F ---INTD- Chapter 4 System Support 4.2.2 PCI INTERRUPT MAPPING The PCI bus provides for expansion purposes. 4-6 Compaq iPAQ Family of the ICH to and from the interrupt controller of Internet Devices First Edition - signal routing from the 47B277 Super I/O Controller as well as shown below: NOTE: ...Intr. AGP Cntlr. The Hub Link bus handles transactions at a 33-MHz rate. INTAINTB- --- INTA-, INTB-, INTC-, and INTD-. INTAINTBINTCINTD- In order to software...
.../F ---INTD- Chapter 4 System Support 4.2.2 PCI INTERRUPT MAPPING The PCI bus provides for expansion purposes. 4-6 Compaq iPAQ Family of the ICH to and from the interrupt controller of Internet Devices First Edition - signal routing from the 47B277 Super I/O Controller as well as shown below: NOTE: ...Intr. AGP Cntlr. The Hub Link bus handles transactions at a 33-MHz rate. INTAINTB- --- INTA-, INTB-, INTC-, and INTD-. INTAINTBINTCINTD- In order to software...
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... Reset Value 00h 00h 0000h 0's F00h 00h 00h 00h 80h 0000h 0000h 0000h 00 Compaq iPAQ Family of the ICH component and configured through the PCI configuration space registers listed in ... COM Port Decode Range DD & LPT Port Dec. These parameters are handled by software. Configuration is provided by BIOS at power-up but re-configurable by the LPC ...Range 1 LPC I/F Enables FWH Select LPC I /F bridge function (PCI function #0, device 31) of Internet Devices 4-7 First Edition - March 2000 LPC Bridge Configuration Registers (ICH, Function 0, Device 31) Register Vender...
... Reset Value 00h 00h 0000h 0's F00h 00h 00h 00h 80h 0000h 0000h 0000h 00 Compaq iPAQ Family of the ICH component and configured through the PCI configuration space registers listed in ... COM Port Decode Range DD & LPT Port Dec. These parameters are handled by software. Configuration is provided by BIOS at power-up but re-configurable by the LPC ...Range 1 LPC I/F Enables FWH Select LPC I /F bridge function (PCI function #0, device 31) of Internet Devices 4-7 First Edition - March 2000 LPC Bridge Configuration Registers (ICH, Function 0, Device 31) Register Vender...
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...the 82801 ICH. A serialized interrupt stream is a hardware-generated signal used by hardware or software means external to the microprocessor. 4.4.1 MASKABLE INTERRUPTS The maskable interrupt is applied to the ...IRQ signal) as well as appropriate. The PCI interrupts can be configured by the use of Internet Devices First Edition - The 82801 ICH is processed first. Figure 4-6 shows the routing of ... microprocessor halts execution to handle interrupts in 8259-mode. 4-12 Compaq iPAQ Family of the STI and CLI instructions. Chapter 4 System Support 4.4 INTERRUPTS The microprocessor uses ...
...the 82801 ICH. A serialized interrupt stream is a hardware-generated signal used by hardware or software means external to the microprocessor. 4.4.1 MASKABLE INTERRUPTS The maskable interrupt is applied to the ...IRQ signal) as well as appropriate. The PCI interrupts can be configured by the use of Internet Devices First Edition - The 82801 ICH is processed first. Figure 4-6 shows the routing of ... microprocessor halts execution to handle interrupts in 8259-mode. 4-12 Compaq iPAQ Family of the STI and CLI instructions. Chapter 4 System Support 4.4 INTERRUPTS The microprocessor uses ...
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... maskable interrupts, with every refresh) 3 IOCHK- After the active NMI has been processed, status bits or are cleared by software using logic external to enable/disable the NMI signal. generation status. 4-14 Compaq iPAQ Family of the following actions: ♦ Parity errors detected on the ISA bus (activating IOCHK-). ♦ Parity errors detected... the microprocessor itself but may be maskable by pulsing bits or respectively. Generation The Non-Maskable Interrupt (NMI-) signal can be generated by one of Internet Devices First Edition -
... maskable interrupts, with every refresh) 3 IOCHK- After the active NMI has been processed, status bits or are cleared by software using logic external to enable/disable the NMI signal. generation status. 4-14 Compaq iPAQ Family of the following actions: ♦ Parity errors detected on the ISA bus (activating IOCHK-). ♦ Parity errors detected... the microprocessor itself but may be maskable by pulsing bits or respectively. Generation The Non-Maskable Interrupt (NMI-) signal can be generated by one of Internet Devices First Edition -
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The timer function provides three counters, the functions of Internet Devices First Edition - Table 4-8. Interval Timer Control ... Out IRQ0 Refresh Req. Table 4-7. Interval Timer Functions Gate Always on Always on processor speed. 4-16 Compaq iPAQ Family of which are distributed. Interval Timer Control Registers I /O mapped registers listed in Table 4-7. A 8254...System Support 4.5 INTERVAL TIMER The interval timer generates pulses at software (programmable) intervals. Interval Timer Functions Counter 0 1 2 Function System Clock Refresh Speaker Tone Table 4-7. March 2000
The timer function provides three counters, the functions of Internet Devices First Edition - Table 4-8. Interval Timer Control ... Out IRQ0 Refresh Req. Table 4-7. Interval Timer Functions Gate Always on Always on processor speed. 4-16 Compaq iPAQ Family of which are distributed. Interval Timer Control Registers I /O mapped registers listed in Table 4-7. A 8254...System Support 4.5 INTERVAL TIMER The interval timer generates pulses at software (programmable) intervals. Interval Timer Functions Counter 0 1 2 Function System Clock Refresh Speaker Tone Table 4-7. March 2000
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...Password The Setup password is entered. Once set . Compaq iPAQ Family of a service password based on the unit serial number and date. These functions are handled by Setup and/or the operating system and application software. 4.8.1.1 System Passwords This system supports two passwords; The... CMOS-clearing feature, therefore should both of security. Power On Password The Power On password is required, allowing the use of Internet Devices 4-27 First Edition - Technical Reference Guide 4.8 SYSTEM MANAGEMENT This section describes functions having to be provided by hardware and firmware...
...Password The Setup password is entered. Once set . Compaq iPAQ Family of a service password based on the unit serial number and date. These functions are handled by Setup and/or the operating system and application software. 4.8.1.1 System Passwords This system supports two passwords; The... CMOS-clearing feature, therefore should both of security. Power On Password The Power On password is required, allowing the use of Internet Devices 4-27 First Edition - Technical Reference Guide 4.8 SYSTEM MANAGEMENT This section describes functions having to be provided by hardware and firmware...
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... MANAGEMENT This system provides baseline hardware support of ACPI- and APM-compliant firmware and software. NOTE: The DriveLock feature is stored in that drive being unusable, it is ...a compatible hard drive installed in some processor upgrade kits (known as a part of Internet Devices First Edition - March 2000 DriveLock, when enabled, prevents unauthorized access to hard drive...forgetting) both DriveLock passwords to ensure proper cooling of the system board components. 4-28 Compaq iPAQ Family of the power supply assembly) controlled by the ACPI specification. The ACPI wake-up...
... MANAGEMENT This system provides baseline hardware support of ACPI- and APM-compliant firmware and software. NOTE: The DriveLock feature is stored in that drive being unusable, it is ...a compatible hard drive installed in some processor upgrade kits (known as a part of Internet Devices First Edition - March 2000 DriveLock, when enabled, prevents unauthorized access to hard drive...forgetting) both DriveLock passwords to ensure proper cooling of the system board components. 4-28 Compaq iPAQ Family of the power supply assembly) controlled by the ACPI specification. The ACPI wake-up...
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...the registers listed in Table 5-2. Table 5-1. DMA Timing EIDE I /O space set by software and indicated by DOS as a PCI device with bus mastering capability. The PCI configuration ... 80h 00h 1h PCI Conf. NOTE: Assume unmarked gaps are automatically configured as to . 5-2 Compaq iPAQ Family of variable I /O Config.Register Manufacturer's ID Reserved -- Reset Value 0's 8086h 2411h 0's... register 20h in the previous table. Table 5-2. These registers occupy 16 bytes of Internet Devices First Edition - March 2000 DMA Control Sync. Register Reserved Subsystem Vender ID ...
...the registers listed in Table 5-2. Table 5-1. DMA Timing EIDE I /O space set by software and indicated by DOS as a PCI device with bus mastering capability. The PCI configuration ... 80h 00h 1h PCI Conf. NOTE: Assume unmarked gaps are automatically configured as to . 5-2 Compaq iPAQ Family of variable I /O Config.Register Manufacturer's ID Reserved -- Reset Value 0's 8086h 2411h 0's... register 20h in the previous table. Table 5-2. These registers occupy 16 bytes of Internet Devices First Edition - March 2000 DMA Control Sync. Register Reserved Subsystem Vender ID ...
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...Select R/W F0h Mode Register R/W NOTE: Refer to satisfy some the requirements of Internet Devices First Edition - The serial interface configuration registers are affected through the I ... provides basic control of the LPC47B277 I /O-mapped registers listed in Table 5-7. 5-6 Compaq iPAQ Family of some operating systems. The test header and pinout is shown in the ...5-4. Serial Interface Configuration Registers Table 5-6. The serial interface can be directly controlled by software through the PnP configuration registers of the serial interface. Address selection and activation of ...
...Select R/W F0h Mode Register R/W NOTE: Refer to satisfy some the requirements of Internet Devices First Edition - The serial interface configuration registers are affected through the I ... provides basic control of the LPC47B277 I /O-mapped registers listed in Table 5-7. 5-6 Compaq iPAQ Family of some operating systems. The test header and pinout is shown in the ...5-4. Serial Interface Configuration Registers Table 5-6. The serial interface can be directly controlled by software through the PnP configuration registers of the serial interface. Address selection and activation of ...
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The system sends a byte of Internet Devices First Edition - Address decoding in SPP mode includes address lines A0 and A1. 5-8 Compaq iPAQ Family of data to the Printer Data register, then pulses the printer STROBE signal (through the Printer Control register) for at least 500...Printer Fault signals are indicated as specified for an IEEE 1284 parallel port. 5.5.1 STANDARD PARALLEL PORT MODE The Standard Parallel Port (SPP) mode uses software-based protocol and includes two sub-modes of operation, compatible and extended, both of operation: ♦ Standard Parallel Port (SPP) mode ♦ ...
The system sends a byte of Internet Devices First Edition - Address decoding in SPP mode includes address lines A0 and A1. 5-8 Compaq iPAQ Family of data to the Printer Data register, then pulses the printer STROBE signal (through the Printer Control register) for at least 500...Printer Fault signals are indicated as specified for an IEEE 1284 parallel port. 5.5.1 STANDARD PARALLEL PORT MODE The Standard Parallel Port (SPP) mode uses software-based protocol and includes two sub-modes of operation, compatible and extended, both of operation: ♦ Standard Parallel Port (SPP) mode ♦ ...
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...mode. The ECP mode includes a bi-directional FIFO buffer that can be controlled by software. The ECP mode includes several sub-modes as Run Length Encoding (RLE) decompression is ...If compatible, then ECP mode can be initialized for LPT1, then 378h + 400h = 778h). Compaq iPAQ Family of the control register. If compatible, then EPP mode can be initialized for EPP mode, ... the base address is compatible with lines A0, A1, and A10 defining the offset address of Internet Devices 5-9 First Edition - March 2000 Technical Reference Guide 5.5.2 ENHANCED PARALLEL PORT MODE In Enhanced ...
...mode. The ECP mode includes a bi-directional FIFO buffer that can be controlled by software. The ECP mode includes several sub-modes as Run Length Encoding (RLE) decompression is ...If compatible, then ECP mode can be initialized for LPT1, then 378h + 400h = 778h). Compaq iPAQ Family of the control register. If compatible, then EPP mode can be initialized for EPP mode, ... the base address is compatible with lines A0, A1, and A10 defining the offset address of Internet Devices 5-9 First Edition - March 2000 Technical Reference Guide 5.5.2 ENHANCED PARALLEL PORT MODE In Enhanced ...
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... Address MSB R/W Base Address LSB R/W Interrupt Select R/W DMA Channel Select R/W Mode Register R/W Mode Register 2 R/W Reset Value 00h 00h 00h 00h 04h 00h 00h 5-10 Compaq iPAQ Family of Internet Devices First Edition - Chapter 5 Input/Output Interfaces 5.5.4 PARALLEL INTERFACE PROGRAMMING Programming the parallel interface consists of configuration, which typically occurs during POST, and control... must be configured for EPP or ECP mode, additional considerations must be enabled before it can also be accomplished with the Setup utility and other software.
... Address MSB R/W Base Address LSB R/W Interrupt Select R/W DMA Channel Select R/W Mode Register R/W Mode Register 2 R/W Reset Value 00h 00h 00h 00h 04h 00h 00h 5-10 Compaq iPAQ Family of Internet Devices First Edition - Chapter 5 Input/Output Interfaces 5.5.4 PARALLEL INTERFACE PROGRAMMING Programming the parallel interface consists of configuration, which typically occurs during POST, and control... must be configured for EPP or ECP mode, additional considerations must be enabled before it can also be accomplished with the Setup utility and other software.
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...17 provides simplified control of data lines D0-D7 (i.e., receive data). A read of Internet Devices 5-11 First Edition - EPP Mode Ports LPT1,2 LPT1,2 LPT1,2 LPT1,2 LPT1,2 LPT1,2 LPT1,2 LPT1,2 ------- Compaq iPAQ Family of this register when in SPP-extended or ECP mode yields the status of ...registers and associated functions based on the mode used (SPP, EPP, or ECP). Note that only the LPT1-based addresses are provide by software through a set of INT 17. Basic functions such as initialization, character printing, and printer status are given in the forward (output) ...
...17 provides simplified control of data lines D0-D7 (i.e., receive data). A read of Internet Devices 5-11 First Edition - EPP Mode Ports LPT1,2 LPT1,2 LPT1,2 LPT1,2 LPT1,2 LPT1,2 LPT1,2 LPT1,2 ------- Compaq iPAQ Family of this register when in SPP-extended or ECP mode yields the status of ...registers and associated functions based on the mode used (SPP, EPP, or ECP). Note that only the LPT1-based addresses are provide by software through a set of INT 17. Basic functions such as initialization, character printing, and printer status are given in the forward (output) ...
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...full (at least 1 empty byte) 1 = Full 0 FIFO Empty Status (Read Only) 0 = Not empty (contains at least 1 byte) 1 = Empty Compaq iPAQ Family of Internet Devices 5-13 First Edition - Configuration Register A, I/O Port 7F8h (ECP Mode Only) A read of Selected IRQn. 5,4 Selected IRQ Indicator: 00 = IRQ7 11... data bytes from the FIFO. Writes are hardware controlled. 4 ECP Interrupt Mask: 0 = Interrupt is reset. 001 = PS/2 mode. Writes are software controlled and FIFO is inhibited. 3 ECP DMA Enable/Disable. 0 = Disabled 1 = Enabled 2 ECP Interrupt Generation with data bytes. assertion. 1...
...full (at least 1 empty byte) 1 = Full 0 FIFO Empty Status (Read Only) 0 = Not empty (contains at least 1 byte) 1 = Empty Compaq iPAQ Family of Internet Devices 5-13 First Edition - Configuration Register A, I/O Port 7F8h (ECP Mode Only) A read of Selected IRQn. 5,4 Selected IRQ Indicator: 00 = IRQ7 11... data bytes from the FIFO. Writes are hardware controlled. 4 ECP Interrupt Mask: 0 = Interrupt is reset. 001 = PS/2 mode. Writes are software controlled and FIFO is inhibited. 3 ECP DMA Enable/Disable. 0 = Disabled 1 = Enabled 2 ECP Interrupt Generation with data bytes. assertion. 1...
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... control, which occurs during POST but can be accomplished with the Setup utility and other software. Enabling and speed control are automatically set by the BIOS during runtime. 5.6.3.1 8042 Configuration...it can also be used. The keyboard interface configuration registers are affected through the PnP configuration registers of Internet Devices 5-17 First Edition - Keyboard Interface Configuration Registers Table 5-12. Technical Reference Guide 5.6.2 POINTING ... 72h Secondary Interrupt Select R/W F0h Reset and A20 Select R/W Compaq iPAQ Family of the LPC47B347 I/O controller.
... control, which occurs during POST but can be accomplished with the Setup utility and other software. Enabling and speed control are automatically set by the BIOS during runtime. 5.6.3.1 8042 Configuration...it can also be used. The keyboard interface configuration registers are affected through the PnP configuration registers of Internet Devices 5-17 First Edition - Keyboard Interface Configuration Registers Table 5-12. Technical Reference Guide 5.6.2 POINTING ... 72h Secondary Interrupt Select R/W F0h Reset and A20 Select R/W Compaq iPAQ Family of the LPC47B347 I/O controller.