Motherboard Installation Guide
Page 166
...are MODBINable by a port & interface swap (optional). 3. Check validity of L2 cache (socket 7 or below) Expand compressed BIOS code to DRAM Call chipset hook to copy BIOS back to check out interface in physical address 1000:0 Initial Superio_Early_Init switch. 1. Onboard clock generator initialization. Early ...switch. If CMOS checksum fails, use . A.4 Debug Code Table Code CPU INIT DET CPU CHIPINIT DET DRAM DC FCODE EFSHADOW DC XCODE INIT IO CLR SCRN INIT8042 ENABLEKB DIS MS R/W FSEG DET FLASH TESTCMOS PRG CHIP INIT CLK CHECKCPU INTRINIT REC MPS Reserved Reserved SET FDD INITINT9...
...are MODBINable by a port & interface swap (optional). 3. Check validity of L2 cache (socket 7 or below) Expand compressed BIOS code to DRAM Call chipset hook to copy BIOS back to check out interface in physical address 1000:0 Initial Superio_Early_Init switch. 1. Onboard clock generator initialization. Early ...switch. If CMOS checksum fails, use . A.4 Debug Code Table Code CPU INIT DET CPU CHIPINIT DET DRAM DC FCODE EFSHADOW DC XCODE INIT IO CLR SCRN INIT8042 ENABLEKB DIS MS R/W FSEG DET FLASH TESTCMOS PRG CHIP INIT CLK CHECKCPU INTRINIT REC MPS Reserved Reserved SET FDD INITINT9...