User Guide
Page 202
...), the processor switches 102 drivers simultaneously, which can lead to the inquire cycle properly. This requirement guarantees the processor recognizes and responds to ground-bounce spikes. If the processor switches the data bus (D[63:0] and DP[7:0]) during a write cycle off this same clock edge. 180 Bus Cycles Chapter 7 Preliminary Information AMD-K6™-2E+ Embedded Processor Data...
...), the processor switches 102 drivers simultaneously, which can lead to the inquire cycle properly. This requirement guarantees the processor recognizes and responds to ground-bounce spikes. If the processor switches the data bus (D[63:0] and DP[7:0]) during a write cycle off this same clock edge. 180 Bus Cycles Chapter 7 Preliminary Information AMD-K6™-2E+ Embedded Processor Data...
User Guide
Page 263
... for use by the Basic Input Output System (BIOS), specialized low-level device drivers, and the operating system. The processor enters SMM by the assertion of the SMI# interrupt and the processor's acknowledgment by the assertion of a system management interrupt (SMI#) and handled by... following characteristics: s Addressing and operation in SMM, and the SMI# and SMIACT# signals. 23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 12 System Management Mode (SMM) 12.1 SMM is an alternate operating mode entered by way of SMIACT#. These...
... for use by the Basic Input Output System (BIOS), specialized low-level device drivers, and the operating system. The processor enters SMM by the assertion of the SMI# interrupt and the processor's acknowledgment by the assertion of a system management interrupt (SMI#) and handled by... following characteristics: s Addressing and operation in SMM, and the SMI# and SMIACT# signals. 23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 12 System Management Mode (SMM) 12.1 SMM is an alternate operating mode entered by way of SMIACT#. These...