Revision History
Page 44
... SBRMI_x01[2]), the SB-RMI processor state accesses will not be able to access processor state using SB-RMI processor state accesses. Revision Guide ... completion, instead of an APML SB-RMI processor state access may cause the internal processor state access interface to hang. Fix Planned Yes...interface remains hung and all future SB-RMI processor state accesses receive command timeouts until a cold reset is performed. ... Specification, order# 41918 for AMD Family 15h Models 00h-0Fh Processors 48063 Rev. 3.18 October 2012 624 SB-RMI Processor State Accesses May Persistently Timeout if...
... SBRMI_x01[2]), the SB-RMI processor state accesses will not be able to access processor state using SB-RMI processor state accesses. Revision Guide ... completion, instead of an APML SB-RMI processor state access may cause the internal processor state access interface to hang. Fix Planned Yes...interface remains hung and all future SB-RMI processor state accesses receive command timeouts until a cold reset is performed. ... Specification, order# 41918 for AMD Family 15h Models 00h-0Fh Processors 48063 Rev. 3.18 October 2012 624 SB-RMI Processor State Accesses May Persistently Timeout if...
Revision History
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...Revision Guide for this erratum occur, an unexpected #GP exception may incorrectly generate a #GP exception when an instruction executes within a small window of the linear-memory address at the limit of canonical address space (0000_7FFF_FFFF_FFFFh: 0000_7FFF_FFFF_FFF2h) and multiple branch mis-predicts occur to a ... the limit of canonical address space. Potential Effect on System In the unlikely event that the conditions for AMD Family 15h Models 00h-0Fh Processors 48063 Rev. 3.18 October 2012 636 Instruction Addresses Near Canonical Address Limit May Cause #GP Exception Description The...
...Revision Guide for this erratum occur, an unexpected #GP exception may incorrectly generate a #GP exception when an instruction executes within a small window of the linear-memory address at the limit of canonical address space (0000_7FFF_FFFF_FFFFh: 0000_7FFF_FFFF_FFF2h) and multiple branch mis-predicts occur to a ... the limit of canonical address space. Potential Effect on System In the unlikely event that the conditions for AMD Family 15h Models 00h-0Fh Processors 48063 Rev. 3.18 October 2012 636 Instruction Addresses Near Canonical Address Limit May Cause #GP Exception Description The...
Revision History
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..., or a system hang if it occurs while another processor core is transitioning to the Core C6 (CC6) state. Potential Effect on a BIOS update. 48063 Rev. 3.18 October 2012 Revision Guide for AMD Family 15h Models 00h-0Fh Processors 661 P-State Limit and Stop Clock Assertion May Cause ...System Hang Description A P-state limit change that occurs within a small timing window of a Stop Clock assertion may result in DRAM not entering self...
..., or a system hang if it occurs while another processor core is transitioning to the Core C6 (CC6) state. Potential Effect on a BIOS update. 48063 Rev. 3.18 October 2012 Revision Guide for AMD Family 15h Models 00h-0Fh Processors 661 P-State Limit and Stop Clock Assertion May Cause ...System Hang Description A P-state limit change that occurs within a small timing window of a Stop Clock assertion may result in DRAM not entering self...
