Manual/User Guide
Page 16
... out burst 5-144 5.6.4 Power-on and reset 5-145 CHAPTER 6 Operations 6-1 6.1 Device Response to the Reset 6-2 6.1.1 Response to power-on 6-2 6.1.2 Response to hardware reset 6-3 6.1.3 Response to software reset 6-5 6.1.4 Response to diagnostic command 6-6 xii C141-E192-02EN
... out burst 5-144 5.6.4 Power-on and reset 5-145 CHAPTER 6 Operations 6-1 6.1 Device Response to the Reset 6-2 6.1.1 Response to power-on 6-2 6.1.2 Response to hardware reset 6-3 6.1.3 Response to software reset 6-5 6.1.4 Response to diagnostic command 6-6 xii C141-E192-02EN
Manual/User Guide
Page 19
... 5-144 Figure 5.21 Power-on Reset Timing 5-145 Figure 6.1 Figure 6.2 Figure 6.3 Figure 6.4 Figure 6.5 Figure 6.6 Figure 6.7 Response to power-on 6-3 Response to hardware reset 6-4 Response to software reset 6-5 Response to diagnostic command 6-6 Sector slip processing 6-10 Automatic alternating processing 6-11 Data buffer structure 6-12 C141-E192-02EN xv
... 5-144 Figure 5.21 Power-on Reset Timing 5-145 Figure 6.1 Figure 6.2 Figure 6.3 Figure 6.4 Figure 6.5 Figure 6.6 Figure 6.7 Response to power-on 6-3 Response to hardware reset 6-4 Response to software reset 6-5 Response to diagnostic command 6-6 Sector slip processing 6-10 Automatic alternating processing 6-11 Data buffer structure 6-12 C141-E192-02EN xv
Manual/User Guide
Page 88
...information of the sector count are displayed in the Command register. Interface (2) Device Control register (X'3F6') The Device Control register contains device interrupt and software reset. Bit 1: nIEN bit enables an interrupt (INTRQ signal) from the device to execute the DASP- When this bit is 1 or the ...device is not selected, the INTRQ signal is the host software reset bit. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 HOB X X X X SRST nIEN 0 - The host system can be enabled through...
...information of the sector count are displayed in the Command register. Interface (2) Device Control register (X'3F6') The Device Control register contains device interrupt and software reset. Bit 1: nIEN bit enables an interrupt (INTRQ signal) from the device to execute the DASP- When this bit is 1 or the ...device is not selected, the INTRQ signal is the host software reset bit. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 HOB X X X X SRST nIEN 0 - The host system can be enabled through...
Manual/User Guide
Page 118
...02EN Interface Table 5.5 Features register values and settable modes Features Register X'02' X'03' X'05' X'42' X'55' X'66' X'82' X'85' X'AA' X'BB' X'C2' X'CC' Drive operation mode Enables the write cache function. At power-on or after hardware reset, the default mode is done. Specifies the transfer of 4-byte ECC...Set the advanced power management mode to the command, nothing is set as follows. Enables the reverting to power-on default settings after software reset. (*1) *1 Although there is a response to Mode-0. Disables the reverting to power-on default settings after...
...02EN Interface Table 5.5 Features register values and settable modes Features Register X'02' X'03' X'05' X'42' X'55' X'66' X'82' X'85' X'AA' X'BB' X'C2' X'CC' Drive operation mode Enables the write cache function. At power-on or after hardware reset, the default mode is done. Specifies the transfer of 4-byte ECC...Set the advanced power management mode to the command, nothing is set as follows. Enables the reverting to power-on default settings after software reset. (*1) *1 Although there is a response to Mode-0. Disables the reverting to power-on default settings after...
Manual/User Guide
Page 121
..., and then Automatic Acoustic Management is completed, the device clears the BSY bit and generates an interrupt. Setting the seek mode by the drive across power on, hardware and software resets. 5.3 Host Commands *3) Automatic Acoustic Management (AAM) The host writes to the seek operation in a block) for all command processing. (15) SET...
..., and then Automatic Acoustic Management is completed, the device clears the BSY bit and generates an interrupt. Setting the seek mode by the drive across power on, hardware and software resets. 5.3 Host Commands *3) Automatic Acoustic Management (AAM) The host writes to the seek operation in a block) for all command processing. (15) SET...
Manual/User Guide
Page 139
... information x x x DV xx xx xx xx xx Error information C141-E192-02EN 5-65 5.3 Host Commands (27) SLEEP (X'99' or X'E6') This command is to execute a software or hardware reset. The device generates an interrupt even if the device has not fully entered the sleep mode. The only way to release the...
... information x x x DV xx xx xx xx xx Error information C141-E192-02EN 5-65 5.3 Host Commands (27) SLEEP (X'99' or X'E6') This command is to execute a software or hardware reset. The device generates an interrupt even if the device has not fully entered the sleep mode. The only way to release the...
Manual/User Guide
Page 166
... SET, DEVICE CONFIGURATION FREEZE LOCK, DEVICE CONFIGURATION IDENTIFY, and DEVICE CONFIGURATION RESTORE commands are kept for the device power down , not cleared by a hardware or software reset. Interface At command completion (I-O register contents) 1F7h(ST) 1F6h(DH) 1F5h(CH) 1F4h(CL) 1F3h(SN) 1F2h(SC) 1F1h(ER) Status information x x x DV xx...
... SET, DEVICE CONFIGURATION FREEZE LOCK, DEVICE CONFIGURATION IDENTIFY, and DEVICE CONFIGURATION RESTORE commands are kept for the device power down , not cleared by a hardware or software reset. Interface At command completion (I-O register contents) 1F7h(ST) 1F6h(DH) 1F5h(CH) 1F4h(CL) 1F3h(SN) 1F2h(SC) 1F1h(ER) Status information x x x DV xx...
Manual/User Guide
Page 192
...Ultra DMA data in the SET FEATURES command shall be less than or equal to its previously selected Ultra DMA Mode after executing a Software reset sequence. An Ultra DMA capable device shall retain its default nonUltra DMA Modes after a sufficient time to allow for propagation delay,... host asserts DMACK-. The Ultra DMA Mode selected by the host. retain their standard definitions. During an Ultra DMA burst a sender shall always drive data onto the bus, and after executing a Power on or hardware reset. 5-118 C141-E192-02EN Interface 5.5 Ultra DMA Feature Set 5.5.1 Overview...
...Ultra DMA data in the SET FEATURES command shall be less than or equal to its previously selected Ultra DMA Mode after executing a Software reset sequence. An Ultra DMA capable device shall retain its default nonUltra DMA Modes after a sufficient time to allow for propagation delay,... host asserts DMACK-. The Ultra DMA Mode selected by the host. retain their standard definitions. During an Ultra DMA burst a sender shall always drive data onto the bus, and after executing a Power on or hardware reset. 5-118 C141-E192-02EN Interface 5.5 Ultra DMA Feature Set 5.5.1 Overview...
Manual/User Guide
Page 219
negation to DASP- assertion Min. 5.6 Timing 5.6.4 Power-on and reset Figure 5.21 shows power-on and reset (hardware and software reset) timing. (1) Only master device is present Clear Reset *1 Power-on RESETSoftware reset BSY tM tN DASPtP *1: Reset means including ... tP Time from RESET- Max. Unit 25 - µs - 400 ns - 1 ms - 30 s - 400 ms - 31 s Figure 5.21 Power-on -Reset, Hardware Reset (RESET-), and Software Reset. (2) Master and slave devices are present (2-drives configuration) [Master device] BSY DASP- [Slave device] BSY PDIAG- Clear Reset tN tP tR tQ...
negation to DASP- assertion Min. 5.6 Timing 5.6.4 Power-on and reset Figure 5.21 shows power-on and reset (hardware and software reset) timing. (1) Only master device is present Clear Reset *1 Power-on RESETSoftware reset BSY tM tN DASPtP *1: Reset means including ... tP Time from RESET- Max. Unit 25 - µs - 400 ns - 1 ms - 30 s - 400 ms - 31 s Figure 5.21 Power-on -Reset, Hardware Reset (RESET-), and Software Reset. (2) Master and slave devices are present (2-drives configuration) [Master device] BSY DASP- [Slave device] BSY PDIAG- Clear Reset tN tP tR tQ...
Manual/User Guide
Page 225
...- signal. Master device X"0C" or X"04" X"00" Status Reg. Slave device BSY bit PDIAGDASP- After the slave device receives the software reset, the slave device shall report its presence and the result of the self-diagnostics to a slave device, the IDD asserts the DASP-...31 sec. signal: negated within 1 ms and asserted within 30 seconds The asserted PDIAG-signal is negated 30 seconds after it is asserted if the command is checked for a software reset. 6.1 Device Response to the Reset 6.1.3 Response to software reset C141-E192-02EN 6-5 signal when negating the PDIAG- ...
...- signal. Master device X"0C" or X"04" X"00" Status Reg. Slave device BSY bit PDIAGDASP- After the slave device receives the software reset, the slave device shall report its presence and the result of the self-diagnostics to a slave device, the IDD asserts the DASP-...31 sec. signal: negated within 1 ms and asserted within 30 seconds The asserted PDIAG-signal is negated 30 seconds after it is asserted if the command is checked for a software reset. 6.1 Device Response to the Reset 6.1.3 Response to software reset C141-E192-02EN 6-5 signal when negating the PDIAG- ...
Manual/User Guide
Page 228
...drive enters the standby mode under the standby mode takes longer than the active, active idle, or low power idle mode because the access to execute a software...command. • A reset is minimal in the sleep mode. The drive enters only the standby mode from the standby mode is ignored.) 6-8... is still stayed in the standby mode. • Reset (hardware or software) • STANDBY command • STANDBY IMMEDIATE command • INITIALIZE DEVICE...the spindle motor has stopped from the low power idle state. The drive enters the sleep mode under the following condition: • A SLEEP ...
...drive enters the standby mode under the standby mode takes longer than the active, active idle, or low power idle mode because the access to execute a software...command. • A reset is minimal in the sleep mode. The drive enters only the standby mode from the standby mode is ignored.) 6-8... is still stayed in the standby mode. • Reset (hardware or software) • STANDBY command • STANDBY IMMEDIATE command • INITIALIZE DEVICE...the spindle motor has stopped from the low power idle state. The drive enters the sleep mode under the following condition: • A SLEEP ...
Manual/User Guide
Page 250
..., 6-2 reset response 6-20 reset timing 5-145 resistor, pull-up or pull-down 5-129 response, to diagnostic command 6-6 hardware reset 6-3 power-on 6-2 software reset 6-5 response to diagnostic command 6-6 hardware reset 6-3 power-on 6-2 software reset 6-5 S sector slip processing 6-10 sequential command 6-16 sequential hit 6-16 sleep mode 6-8 spare area 6-9 standby mode 6-8 status report in...
..., 6-2 reset response 6-20 reset timing 5-145 resistor, pull-up or pull-down 5-129 response, to diagnostic command 6-6 hardware reset 6-3 power-on 6-2 software reset 6-5 response to diagnostic command 6-6 hardware reset 6-3 power-on 6-2 software reset 6-5 S sector slip processing 6-10 sequential command 6-16 sequential hit 6-16 sleep mode 6-8 spare area 6-9 standby mode 6-8 status report in...