Product Specification
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Introduction...1 1.1 Purpose...1 1.2 Audience ...1 1.3 SAI2 Server Board Feature Overview 1 1.4 SAI2 Server Board Block Diagram 2 2. SAI2 Server Board Architecture Overview 3 2.1 Intel® Pentium® III Processor Subsystem 3 2.1.1 Supported Processor Types 3 2.1.2 Dual Processor Operation 3 2.1.3 PGA370 Socket ...4 2.1.4 Processor Bus Termination / Regulation / Power 4 2.1.5 APIC Bus ...4 2.1.6 Boxed Processors...4 2.2 ServerWorks ServerSet III LE Chipset 5 2.3 Memory ...5 2.4 PCI I/O Subsystem...6 2.4.1 64-bit / 66 MHz PCI Subsystem 6 2.4.2 32-bit/33 MHz...
Introduction...1 1.1 Purpose...1 1.2 Audience ...1 1.3 SAI2 Server Board Feature Overview 1 1.4 SAI2 Server Board Block Diagram 2 2. SAI2 Server Board Architecture Overview 3 2.1 Intel® Pentium® III Processor Subsystem 3 2.1.1 Supported Processor Types 3 2.1.2 Dual Processor Operation 3 2.1.3 PGA370 Socket ...4 2.1.4 Processor Bus Termination / Regulation / Power 4 2.1.5 APIC Bus ...4 2.1.6 Boxed Processors...4 2.2 ServerWorks ServerSet III LE Chipset 5 2.3 Memory ...5 2.4 PCI I/O Subsystem...6 2.4.1 64-bit / 66 MHz PCI Subsystem 6 2.4.2 32-bit/33 MHz...
Product Specification
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... (MS) Connectors 52 4.3.9 Parallel Port (LPT1 52 4.3.10 Serial Ports COM1 and COM2 52 4.3.11 RJ-45 LAN Connector (J2 53 Revision 1.0 v SAI2 Server Board TPS Table of Contents 3.1 BIOS Overview...19 3.1.1 System BIOS ...20 3.1.2 Flash Update Utility 20 3.2... Setup Utility ...21 3.2.1 Configuration Utilities Overview 21 3.2.2 Setup Utility Operation 21 3.3 CMOS Memory Definition 32 3.4 CMOS Default Override 32 3.5 Flash Update Utility ...33...
... (MS) Connectors 52 4.3.9 Parallel Port (LPT1 52 4.3.10 Serial Ports COM1 and COM2 52 4.3.11 RJ-45 LAN Connector (J2 53 Revision 1.0 v SAI2 Server Board TPS Table of Contents 3.1 BIOS Overview...19 3.1.1 System BIOS ...20 3.1.2 Flash Update Utility 20 3.2... Setup Utility ...21 3.2.1 Configuration Utilities Overview 21 3.2.2 Setup Utility Operation 21 3.3 CMOS Memory Definition 32 3.4 CMOS Default Override 32 3.5 Flash Update Utility ...33...
Product Specification
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Main Menu Selections 23 Table 8. Memory Reconfiguration Submenu Selections 26 Table 12. Numlock Submenu Selections 29 Table 17. Exit Menu Selections 32 Table 25. Video Controller Supported PCI Commands 9 Table 3. Advanced Submenu Selections 25 Table 11. PCI Device Submenu ... 26 Table 13. Recovery BIOS Port-80 Codes 41 Table 30. SAI2 PCI IDs ...17 Table 5. Option ROM Submenu Selections 28 Table 16. Hard Drive Selections 31 Table 23. Removable Devices Selections 32 Table 24. Peripheral Configuration Submenu Selections 27 Table 14. Secure Mode ...
Main Menu Selections 23 Table 8. Memory Reconfiguration Submenu Selections 26 Table 12. Numlock Submenu Selections 29 Table 17. Exit Menu Selections 32 Table 25. Video Controller Supported PCI Commands 9 Table 3. Advanced Submenu Selections 25 Table 11. PCI Device Submenu ... 26 Table 13. Recovery BIOS Port-80 Codes 41 Table 30. SAI2 PCI IDs ...17 Table 5. Option ROM Submenu Selections 28 Table 16. Hard Drive Selections 31 Table 23. Removable Devices Selections 32 Table 24. Peripheral Configuration Submenu Selections 27 Table 14. Secure Mode ...
Product Specification
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... memory Revision 1.0 1 Support for one or two identical Intel Pentium III processors for support of 4 GB - Four DIMM slots allow a maxiumum installed memory of both primary and secondary processors • ServerWorks* ServerSet* III LE chipset - 133-MHz Front Side Bus (FSB) Capability - SAI2 ... local bus architecture is assumed. 1.3 SAI2 Server Board Feature Overview The SAI2 server board provides the following features: • Dual Intel® Pentium® III processor support - ECC single-bit correction, and multiple-bit detection • 64-bit, 66-MHz, 3.3-V keyed PCI ...
... memory Revision 1.0 1 Support for one or two identical Intel Pentium III processors for support of 4 GB - Four DIMM slots allow a maxiumum installed memory of both primary and secondary processors • ServerWorks* ServerSet* III LE chipset - 133-MHz Front Side Bus (FSB) Capability - SAI2 ... local bus architecture is assumed. 1.3 SAI2 Server Board Feature Overview The SAI2 server board provides the following features: • Dual Intel® Pentium® III processor support - ECC single-bit correction, and multiple-bit detection • 64-bit, 66-MHz, 3.3-V keyed PCI ...
Product Specification
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...segment with the processors and memory subsystems residing on the board. SAI2 Server Board Block Diagram 2x 64bit/66MHz PCI Slots FCPGA Tualatin FCPGA Tualatin 133MHz System Bus 4x 32bit/33MHz PCI Slots PCI (64/66) PCI (32/33) MLCE-HT Up to 4GB ECC Memory (4 DIMMs) PC133 Buffered...mouse, and Real-Time Clock) - 4 megabit Flash device for system BIOS • Dual Universal Serial Bus (USB) ports • Two IDE connectors • Flash BIOS support for all of the SAI2 server board. SAI2 Server Board Block Diagram 2 Revision 1.0 Super I/O Controller (PC87417) that provides all PC-...
...segment with the processors and memory subsystems residing on the board. SAI2 Server Board Block Diagram 2x 64bit/66MHz PCI Slots FCPGA Tualatin FCPGA Tualatin 133MHz System Bus 4x 32bit/33MHz PCI Slots PCI (64/66) PCI (32/33) MLCE-HT Up to 4GB ECC Memory (4 DIMMs) PC133 Buffered...mouse, and Real-Time Clock) - 4 megabit Flash device for system BIOS • Dual Universal Serial Bus (USB) ports • Two IDE connectors • Flash BIOS support for all of the SAI2 server board. SAI2 Server Board Block Diagram 2 Revision 1.0 Super I/O Controller (PC87417) that provides all PC-...
Product Specification
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... be of the following SAI2 subsystems: • Pentium III processor subsystem • SeverWorks* ServerSet* III LE chipset • Memory • PCI subsystem • Chipset support components 2.1 Intel® Pentium® III Processor Subsystem The SAI2 server board is based on a design that supports dual-processor and PC/AT compatible operation. SAI2 Server Board TPS SAI2 Server Board Architecture...
... be of the following SAI2 subsystems: • Pentium III processor subsystem • SeverWorks* ServerSet* III LE chipset • Memory • PCI subsystem • Chipset support components 2.1 Intel® Pentium® III Processor Subsystem The SAI2 server board is based on a design that supports dual-processor and PC/AT compatible operation. SAI2 Server Board TPS SAI2 Server Board Architecture...
Product Specification
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...and target on the Intel Pentium III processor. A wide range of single interleaved memory (64-bit main memory plus ECC). Empty memory slots between DIMMs are not supported. The maximum configurable memory size is both a master and a target on the 32-bit, 33-MHz PCI bus. Although the SAI2 server board architecture ...be installed in . The CSB5 South Bridge is responsible for many of the PCI buses. The ServerWorks ServerSet III LE chipset consists of two components: • CNB30LE North Bridge The CNB30LE North Bridge is responsible for accepting access requests from the...
...and target on the Intel Pentium III processor. A wide range of single interleaved memory (64-bit main memory plus ECC). Empty memory slots between DIMMs are not supported. The maximum configurable memory size is both a master and a target on the 32-bit, 33-MHz PCI bus. Although the SAI2 server board architecture ...be installed in . The CSB5 South Bridge is responsible for many of the PCI buses. The ServerWorks ServerSet III LE chipset consists of two components: • CNB30LE North Bridge The CNB30LE North Bridge is responsible for accepting access requests from the...
Product Specification
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...board supports both base (conventional) and extended memory. 2.4 PCI I/O Subsystem The expansion capabilities of the SAI2 server board meet the needs of file and application servers for high performance I /O APIC, PCI-to a peak of 132 MBps • 8-, 16-, or 32-bit data transfers • Plug-and-...5-V keyed PCI expansion slots • Integrated Intel® EtherExpress™ PRO100+ 10/100 megabit PCI Ethernet controller (Intel® 82559) • Integrated ATI Rage* XL video controller with 8 MB of one 64-bit / 66-MHz bus segment and one 32-bit / 33-MHz bus segment. Industry Standard...
...board supports both base (conventional) and extended memory. 2.4 PCI I/O Subsystem The expansion capabilities of the SAI2 server board meet the needs of file and application servers for high performance I /O APIC, PCI-to a peak of 132 MBps • 8-, 16-, or 32-bit data transfers • Plug-and-...5-V keyed PCI expansion slots • Integrated Intel® EtherExpress™ PRO100+ 10/100 megabit PCI Ethernet controller (Intel® 82559) • Integrated ATI Rage* XL video controller with 8 MB of one 64-bit / 66-MHz bus segment and one 32-bit / 33-MHz bus segment. Industry Standard...
Product Specification
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...performance bus master interface can burst data at up to 132 MBps. The 82559 is a highly integrated PCI Local Area Network (LAN) controller for access to the PCI bus, and also enable back-to disable the embedded NIC in the BIOS Setup option.... communicates with the 82559 using a memory-mapped I/O interface, PCI interrupt connected directly to its predecessor (Intel® 82558). This device is similar in faster frame processing. SAI2 Server Board TPS SAI2 Server Board Architecture Overview 2.4.2.1 Network Interface Controller (NIC) The SAI2 server board includes a 10Base-T /...
...performance bus master interface can burst data at up to 132 MBps. The 82559 is a highly integrated PCI Local Area Network (LAN) controller for access to the PCI bus, and also enable back-to disable the embedded NIC in the BIOS Setup option.... communicates with the 82559 using a memory-mapped I/O interface, PCI interrupt connected directly to its predecessor (Intel® 82558). This device is similar in faster frame processing. SAI2 Server Board TPS SAI2 Server Board Architecture Overview 2.4.2.1 Network Interface Controller (NIC) The SAI2 server board includes a 10Base-T /...
Product Specification
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...64-bit VGA Graphics Accelerator contains a SVGA video controller, clock generator, BitBLT engine, and RAMDAC. It also supports analog VGA monitors, single- One 2M x 32 SDRAM chip provides 8 MB of modes: up to 1600 X 1200 resolution for CRT displays and up to 1024 X 768 resolution for concurrent processing of 32...SAI2 supports the following features of the 82559 controller: • Glueless 32-bit PCI Bus Master Interface (Direct Drive of Bus), compatible with PCI Bus Specification, revision 2.1 / 2.2 • Chained memory...Wake-on-LAN (WOL) 2.4.2.2 Video Controller The SAI2 server ...
...64-bit VGA Graphics Accelerator contains a SVGA video controller, clock generator, BitBLT engine, and RAMDAC. It also supports analog VGA monitors, single- One 2M x 32 SDRAM chip provides 8 MB of modes: up to 1600 X 1200 resolution for CRT displays and up to 1024 X 768 resolution for concurrent processing of 32...SAI2 supports the following features of the 82559 controller: • Glueless 32-bit PCI Bus Master Interface (Direct Drive of Bus), compatible with PCI Bus Specification, revision 2.1 / 2.2 • Chained memory...Wake-on-LAN (WOL) 2.4.2.2 Video Controller The SAI2 server ...
Product Specification
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... Command Type Interrupt Acknowledge Special Cycle I/O Read I/O Write Reserved Reserved Memory Read Memory Write Reserved Reserved Configuration Read Configuration Write Memory Read Multiple Dual Address Cycle Memory Read Line Memory Write and Invalidate Rage XL Support Target Master No No No No... Yes No Yes No No No No No Yes No Yes No No No No No Yes No Yes No No No No No No No No No Revision 1.0 9 SAI2 Server Board TPS SAI2...
... Command Type Interrupt Acknowledge Special Cycle I/O Read I/O Write Reserved Reserved Memory Read Memory Write Reserved Reserved Configuration Read Configuration Write Memory Read Multiple Dual Address Cycle Memory Read Line Memory Write and Invalidate Rage XL Support Target Master No No No No... Yes No Yes No No No No No Yes No Yes No No No No No Yes No Yes No No No No No No No No No Revision 1.0 9 SAI2 Server Board TPS SAI2...
Product Specification
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... a PCI device that this implementation supports, including the number of configuration registers. The SAI2 server board uses the following CSB5 South Bridge features: • PCI interface • IDE interface • USB interface • PC-compatible timer/counters and Direct Memory Access (DMA) controllers • Baseboard Plug-and-Play support • General purpose...
... a PCI device that this implementation supports, including the number of configuration registers. The SAI2 server board uses the following CSB5 South Bridge features: • PCI interface • IDE interface • USB interface • PC-compatible timer/counters and Direct Memory Access (DMA) controllers • Baseboard Plug-and-Play support • General purpose...
Product Specification
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SAI2 Server Board TPS SAI2 Server Board Architecture Overview 2.4.2.3.1 PCI Interface The CSB5 South Bridge fully implements a 32-bit PCI master/slave interface, in accordance with the same bandwidth. The USB controller moves data between main memory... and the two USB connectors provided. It also includes an additional 16-entry I /O APIC that is a power management controller. The SAI2... a slave device. SAI2 supports sleep states s0... On the SAI2 server board,...
SAI2 Server Board TPS SAI2 Server Board Architecture Overview 2.4.2.3.1 PCI Interface The CSB5 South Bridge fully implements a 32-bit PCI master/slave interface, in accordance with the same bandwidth. The USB controller moves data between main memory... and the two USB connectors provided. It also includes an additional 16-entry I /O APIC that is a power management controller. The SAI2... a slave device. SAI2 supports sleep states s0... On the SAI2 server board,...
Product Specification
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... is disabled (clear). This can be mapped to allow the poweron and power-off of the integrated components in non-volatile memory. 2.5.1.6 Plug-and-Play Functions / ISA Data Transfers The PC87417 contains all SIO peripheral control data to an APIC during operating...a PS/2 compatible mouse and keyboard, an SVGA monitor, two serial port connectors, a parallel port connector, a LAN port, and two USB connections. 2.6 Interrupt Routing The SAI2 server board interrupt architecture implements two I/O APICs and two PICs through the PCI Interrupt Address Index Register (I/O Address ...
... is disabled (clear). This can be mapped to allow the poweron and power-off of the integrated components in non-volatile memory. 2.5.1.6 Plug-and-Play Functions / ISA Data Transfers The PC87417 contains all SIO peripheral control data to an APIC during operating...a PS/2 compatible mouse and keyboard, an SVGA monitor, two serial port connectors, a parallel port connector, a LAN port, and two USB connections. 2.6 Interrupt Routing The SAI2 server board interrupt architecture implements two I/O APICs and two PICs through the PCI Interrupt Address Index Register (I/O Address ...
Product Specification
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...the hardware but are defined as: • s0: Normal running the BIOS Setup Utility. 2.9 Wake On LAN Function The remote power-on function turns on the system power through a network or modem. The SAI2 server board supports sleep states s0, s1, s4, and s5. With future versions of Microsoft* Windows*... • Power On • Last State (Factory Default Setting) • Stay Off The AC link mode settings can changed by the OS. The memory and machine state are still running in this state the power supply is still on and the processors still dissipate some power, such that if...
...the hardware but are defined as: • s0: Normal running the BIOS Setup Utility. 2.9 Wake On LAN Function The remote power-on function turns on the system power through a network or modem. The SAI2 server board supports sleep states s0, s1, s4, and s5. With future versions of Microsoft* Windows*... • Power On • Last State (Factory Default Setting) • Stay Off The AC link mode settings can changed by the OS. The memory and machine state are still running in this state the power supply is still on and the processors still dissipate some power, such that if...
Product Specification
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... for Beta, Pxx for these adapters; The BIOS contains standard PC-compatible basic input/output (I/O) services, standard Intel® server features, plus the SAI2 system-specific hardware configuration routines and register default settings, embedded in this functionality, is implemented as used to support ... in battery-backed CMOS configuration RAM. Phoenix* Phlash (PHLASH.EXE) is not specified in Flash read-only memory (ROM). Support for the SAI2 board set. Basic Input Output System (BIOS) This section describes BIOS embedded software for applicable baseboard peripheral devices...
... for Beta, Pxx for these adapters; The BIOS contains standard PC-compatible basic input/output (I/O) services, standard Intel® server features, plus the SAI2 system-specific hardware configuration routines and register default settings, embedded in this functionality, is implemented as used to support ... in battery-backed CMOS configuration RAM. Phoenix* Phlash (PHLASH.EXE) is not specified in Flash read-only memory (ROM). Support for the SAI2 board set. Basic Input Output System (BIOS) This section describes BIOS embedded software for applicable baseboard peripheral devices...
Product Specification
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... Menu. Setup provides sufficient configuration functionality to the user. The configuration utilities modify CMOS RAM and Non-Volatile Random Access Memory (NVRAM) under direction of features. The BIOS POST routines and the BIOS Plug-N-Play Auto-configuration Manager accomplish the actual... • Configuration CMOS RAM definition • Function of the CMOS clear jumper 3.2.1 Configuration Utilities Overview Configuration of the screen. SAI2 Server Board TPS Basic Input Output System (BIOS) 3.2 Setup Utility This section describes the ROM resident setup utility that the user...
... Menu. Setup provides sufficient configuration functionality to the user. The configuration utilities modify CMOS RAM and Non-Volatile Random Access Memory (NVRAM) under direction of features. The BIOS POST routines and the BIOS Plug-N-Play Auto-configuration Manager accomplish the actual... • Configuration CMOS RAM definition • Function of the CMOS clear jumper 3.2.1 Configuration Utilities Overview Configuration of the screen. SAI2 Server Board TPS Basic Input Output System (BIOS) 3.2 Setup Utility This section describes the ROM resident setup utility that the user...
Product Specification
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... is selected and the Enter key is pressed, all changes are highlighted. Feature Processor Type Processor Speed Cache RAM System Memory Extended Memory Language System Time Revision 1.0 Table 7. User Setting 23 Main Menu Selections Choices or Display Description Only Display only Indicates the ...processor(s) type installed. SAI2 Server Board TPS Basic Input Output System (BIOS) F10 Save and Exit pressed, the user...
... is selected and the Enter key is pressed, all changes are highlighted. Feature Processor Type Processor Speed Cache RAM System Memory Extended Memory Language System Time Revision 1.0 Table 7. User Setting 23 Main Menu Selections Choices or Display Description Only Display only Indicates the ...processor(s) type installed. SAI2 Server Board TPS Basic Input Output System (BIOS) F10 Save and Exit pressed, the user...
Product Specification
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... the Option ROM BIOS on boot. Advanced Menu Selections Feature Advanced Memory Reconfiguration CPU Reconfiguration Peripheral Configuration PCI Device Option ROM Numlock Choices or Display Only Description Refer to Option ROM Submenu. SAI2 Server Board TPS Basic Input Output System (BIOS) Feature 32 Bit I/O Transfer Mode Ultra DMA Mode Choices or Display Only...
... the Option ROM BIOS on boot. Advanced Menu Selections Feature Advanced Memory Reconfiguration CPU Reconfiguration Peripheral Configuration PCI Device Option ROM Numlock Choices or Display Only Description Refer to Option ROM Submenu. SAI2 Server Board TPS Basic Input Output System (BIOS) Feature 32 Bit I/O Transfer Mode Ultra DMA Mode Choices or Display Only...
Product Specification
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...only: Normal None Error (CPU Error) Press Enter Enabled Disabled Description Clears CPU error status information. Basic Input Output System (BIOS) SAI2 Server Board TPS Table 11. User Setting Table 12. If enabled, the POST operation pauses if a CPU error occurs. User Setting 26 Revision... 1.0 Memory Reconfiguration Submenu Selections Feature DIMM Group #1 Status DIMM Group #2 Status DIMM Group #3 Status DIMM Group #4 Status Clears DIMM Errors DIMM Error ...
...only: Normal None Error (CPU Error) Press Enter Enabled Disabled Description Clears CPU error status information. Basic Input Output System (BIOS) SAI2 Server Board TPS Table 11. User Setting Table 12. If enabled, the POST operation pauses if a CPU error occurs. User Setting 26 Revision... 1.0 Memory Reconfiguration Submenu Selections Feature DIMM Group #1 Status DIMM Group #2 Status DIMM Group #3 Status DIMM Group #4 Status Clears DIMM Errors DIMM Error ...