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...interrupt system management mode system management RAM serial presence detect standard parallel port static RAM Streaming SIMD extensions super twist pneumatic super VGA software telephone answering device Temperature-sensing And Fan control Integrated circuit telephone answering machine tape carrier package trap flag thin-film transistor Telecommunications ...graphics adapter vibrato very large scale integration Video RAM watt Wake on LAN Windows RAM zero flag zero insertion force (socket) Compaq iPAQ Family of Internet Devices 1-7 First Edition - Technical Reference Guide Table 1-1.
...interrupt system management mode system management RAM serial presence detect standard parallel port static RAM Streaming SIMD extensions super twist pneumatic super VGA software telephone answering device Temperature-sensing And Fan control Integrated circuit telephone answering machine tape carrier package trap flag thin-film transistor Telecommunications ...graphics adapter vibrato very large scale integration Video RAM watt Wake on LAN Windows RAM zero flag zero insertion force (socket) Compaq iPAQ Family of Internet Devices 1-7 First Edition - Technical Reference Guide Table 1-1.
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...included on Celeron and Pentium III processors. The Celeron processor includes MMX technology for Compaq iPAQs. The Celeron processor provides economical performance and is compatible with software written for Celeron, Pentium II, Pentium MMX, Pentium, and x86 processors. ... features 256 kilobytes of Internet Devices First Edition - Both processor architectures include a floatingpoint unit and first and secondary caches providing enhanced performance for enhanced multimedia performance. Chapter 2 System Overview 2.4.1 PROCESSORS The Compaq iPAQ family includes models based on...
...included on Celeron and Pentium III processors. The Celeron processor includes MMX technology for Compaq iPAQs. The Celeron processor provides economical performance and is compatible with software written for Celeron, Pentium II, Pentium MMX, Pentium, and x86 processors. ... features 256 kilobytes of Internet Devices First Edition - Both processor architectures include a floatingpoint unit and first and secondary caches providing enhanced performance for enhanced multimedia performance. Chapter 2 System Overview 2.4.1 PROCESSORS The Compaq iPAQ family includes models based on...
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... The 82810-DC100 GMCH supports the processors listed in the following table: Table 3-1. Chapter 3 Processor/Memory Subsystem 3.2 PROCESSOR The Compaq iPAQ is software-compatible with earlier generation Pentium II, Pentium MMX, Pentium, and x86 processors. The Celeron-based systems ship with branch prediction and...L1/L2 Freq. 500 MHz 533 MHz FSB Freq. 66 MHz 66 MHz Core Voltage 2.0 v 2.0 v Power Consumption Na Na 3-2 Compaq iPAQ Family of the CPU's execution time. March 2000 Celeron Processor CPU FPU FSB I /F), operate at a time. Celeron Processor Internal Architecture...
... The 82810-DC100 GMCH supports the processors listed in the following table: Table 3-1. Chapter 3 Processor/Memory Subsystem 3.2 PROCESSOR The Compaq iPAQ is software-compatible with earlier generation Pentium II, Pentium MMX, Pentium, and x86 processors. The Celeron-based systems ship with branch prediction and...L1/L2 Freq. 500 MHz 533 MHz FSB Freq. 66 MHz 66 MHz Core Voltage 2.0 v 2.0 v Power Consumption Na Na 3-2 Compaq iPAQ Family of the CPU's execution time. March 2000 Celeron Processor CPU FPU FSB I /F), operate at a time. Celeron Processor Internal Architecture...
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...100 MHz 133 MHz 133 MHz 100 MHz 133 MHz The Pentium III processor is software-compatible with ISV, OpenGL, and DirectX applications SSE support requires driver and Service Pack 4 (SP5 recommended) Compaq iPAQ Family of Internet Devices 3-3 First Edition - Operating system requirements for the Celeron processor but includes ... Table 3-2. The Pentium III processor also features 70 FPU-based streaming SIMD extensions (SSE) that, when implemented by appropriate software, can enhance 3D transforming and speech processing operations. Pentium III Processor Statistical Comparison Table 3-2.
...100 MHz 133 MHz 133 MHz 100 MHz 133 MHz The Pentium III processor is software-compatible with ISV, OpenGL, and DirectX applications SSE support requires driver and Service Pack 4 (SP5 recommended) Compaq iPAQ Family of Internet Devices 3-3 First Edition - Operating system requirements for the Celeron processor but includes ... Table 3-2. The Pentium III processor also features 70 FPU-based streaming SIMD extensions (SSE) that, when implemented by appropriate software, can enhance 3D transforming and speech processing operations. Pentium III Processor Statistical Comparison Table 3-2.
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...Configuration Data Register I /O Port 0CF8h, R/W, (32-bit access only) Bit Function 31 Configuration Enable 0 = Disabled 1 = Enable 30..24 Reserved - Compaq iPAQ Family of selected PCI device. 7..2 Register Index. Technical Reference Guide 4.2.1 PCI BUS TRANSACTIONS The PCI bus consists of a 32-bit path (AD31-00 ...types of an address cycle and one address cycle be accessed. Address decoding is handled by software. read/write 0s 23..16 Bus Number. Selects function of Internet Devices 4-3 First Edition - March 2000 High performance is employed. For memory addressing, PCI ...
...Configuration Data Register I /O Port 0CF8h, R/W, (32-bit access only) Bit Function 31 Configuration Enable 0 = Disabled 1 = Enable 30..24 Reserved - Compaq iPAQ Family of selected PCI device. 7..2 Register Index. Technical Reference Guide 4.2.1 PCI BUS TRANSACTIONS The PCI bus consists of a 32-bit path (AD31-00 ...types of an address cycle and one address cycle be accessed. Address decoding is handled by software. read/write 0s 23..16 Bus Number. Selects function of Internet Devices 4-3 First Edition - March 2000 High performance is employed. For memory addressing, PCI ...
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...Pin Count (LPC) bus for handling transactions to and from the interrupt controller of Internet Devices First Edition - Cntlr. Interrupts generated by devices installed in the PCI slots.... by the 810 and 820 chipsets and allows compliant PCI and AGP peripherals to software and not accessible for four interrupt signals; March 2000 INTAINTBINTCINTD- The Hub Link ...protocol. Chapter 4 System Support 4.2.2 PCI INTERRUPT MAPPING The PCI bus provides for expansion purposes. 4-6 Compaq iPAQ Family of the ICH to PCI slots/devices is distributed evenly as the 82802 FWH. Audio Cntlr...
...Pin Count (LPC) bus for handling transactions to and from the interrupt controller of Internet Devices First Edition - Cntlr. Interrupts generated by devices installed in the PCI slots.... by the 810 and 820 chipsets and allows compliant PCI and AGP peripherals to software and not accessible for four interrupt signals; March 2000 INTAINTBINTCINTD- The Hub Link ...protocol. Chapter 4 System Support 4.2.2 PCI INTERRUPT MAPPING The PCI bus provides for expansion purposes. 4-6 Compaq iPAQ Family of the ICH to PCI slots/devices is distributed evenly as the 82802 FWH. Audio Cntlr...
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...EDh F2, F3h Register Device 31 Error Config. These parameters are handled by software. Table 4-3. Reset Value 00h 00h 0000h 0's F00h 00h 00h 00h 80h 0000h 0000h 0000h 00 Compaq iPAQ Family of certain parameters such as reserved. Configuration is provided by BIOS at ... & LPT Port Dec. Technical Reference Guide 4.2.5 PCI CONFIGURATION PCI bus operations, especially those that involve ISA bus interaction, require the configuration of Internet Devices 4-7 First Edition - Range FWH Decode Enable LPC I/F Decode Range 1 LPC I/F Enables FWH Select LPC I /F bridge function (PCI function...
...EDh F2, F3h Register Device 31 Error Config. These parameters are handled by software. Table 4-3. Reset Value 00h 00h 0000h 0's F00h 00h 00h 00h 80h 0000h 0000h 0000h 00 Compaq iPAQ Family of certain parameters such as reserved. Configuration is provided by BIOS at ... & LPT Port Dec. Technical Reference Guide 4.2.5 PCI CONFIGURATION PCI bus operations, especially those that involve ISA bus interaction, require the configuration of Internet Devices 4-7 First Edition - Range FWH Decode Enable LPC I/F Decode Range 1 LPC I/F Enables FWH Select LPC I /F bridge function (PCI function...
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... includes the equivalent of two 8259 interrupt controllers cascaded together, handles the decoding of Internet Devices First Edition - Table 4-13 lists the standard source configuration for maskable interrupts ... 2000 The microprocessor halts execution to handle interrupts in 8259-mode. 4-12 Compaq iPAQ Family of the serial interrupt stream (Serial IRQ signal) as well as appropriate... interrupts. maskable and nonmaskable. A maskable interrupt can be inhibited by hardware or software means external to the microprocessor. 4.4.1 MASKABLE INTERRUPTS The maskable interrupt is a hardware...
... includes the equivalent of two 8259 interrupt controllers cascaded together, handles the decoding of Internet Devices First Edition - Table 4-13 lists the standard source configuration for maskable interrupts ... 2000 The microprocessor halts execution to handle interrupts in 8259-mode. 4-12 Compaq iPAQ Family of the serial interrupt stream (Serial IRQ signal) as well as appropriate... interrupts. maskable and nonmaskable. A maskable interrupt can be inhibited by hardware or software means external to the microprocessor. 4.4.1 MASKABLE INTERRUPTS The maskable interrupt is a hardware...
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...by software using logic external to the microprocessor. NMI: 0 = No NMI from IOCHK- Writing 80h to enable/disable the NMI signal. having top priority over all interrupts including the NMI-. 4.4.2.1 NMI- is used to this register masks generation of Internet Devices...Counter 2 disabled 1 = Counter 2 enabled Functions not related to the microprocessor. There are cleared by pulsing bits or respectively. generation status. 4-14 Compaq iPAQ Family of the NMI-. The NMI Enable Register (070h, ) is active (low), NMI requested, read only 6 IOCHK- signals are routed through the...
...by software using logic external to the microprocessor. NMI: 0 = No NMI from IOCHK- Writing 80h to enable/disable the NMI signal. having top priority over all interrupts including the NMI-. 4.4.2.1 NMI- is used to this register masks generation of Internet Devices...Counter 2 disabled 1 = Counter 2 enabled Functions not related to the microprocessor. There are cleared by pulsing bits or respectively. generation status. 4-14 Compaq iPAQ Family of the NMI-. The NMI Enable Register (070h, ) is active (low), NMI requested, read only 6 IOCHK- signals are routed through the...
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... generator (for 810/810e-based systems). The timer function provides three counters, the functions of Internet Devices First Edition - Table 4-8. Clock Generation and Distribution Table 4-9. Interval Timer Functions Gate Always on Always on processor speed. 4-16 Compaq iPAQ Family of which are distributed. Processor, GMCH (CPUCLK) [1] 100 MHz CK DIMM sockets 48 ... Table 4-9 lists the system board clock signals and how they are listed in Table 4-8. Chapter 4 System Support 4.5 INTERVAL TIMER The interval timer generates pulses at software (programmable) intervals.
... generator (for 810/810e-based systems). The timer function provides three counters, the functions of Internet Devices First Edition - Table 4-8. Clock Generation and Distribution Table 4-9. Interval Timer Functions Gate Always on Always on processor speed. 4-16 Compaq iPAQ Family of which are distributed. Processor, GMCH (CPUCLK) [1] 100 MHz CK DIMM sockets 48 ... Table 4-9 lists the system board clock signals and how they are listed in Table 4-8. Chapter 4 System Support 4.5 INTERVAL TIMER The interval timer generates pulses at software (programmable) intervals.
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... utility will be lost or forgotten then a special utility and BIOS function is entered. Compaq iPAQ Family of security. Setup Password The Setup password is enabled and set , any changes affected...(including that supported by Setup) and does not describe security features that provide different levels of Internet Devices 4-27 First Edition - Power On Password The Power On password is enabled and entered ...Setup and/or the operating system and application software. 4.8.1.1 System Passwords This system supports two passwords; The utility can be enabled through the Setup utility.
... utility will be lost or forgotten then a special utility and BIOS function is entered. Compaq iPAQ Family of security. Setup Password The Setup password is enabled and set , any changes affected...(including that supported by Setup) and does not describe security features that provide different levels of Internet Devices 4-27 First Edition - Power On Password The Power On password is enabled and entered ...Setup and/or the operating system and application software. 4.8.1.1 System Passwords This system supports two passwords; The utility can be enabled through the Setup utility.
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... be entered for connection to ensure proper cooling of the system board components. 4-28 Compaq iPAQ Family of the power supply assembly) controlled by thermal sensing logic. The system should..., and fan) can then be operated with the hard drive). and APM-compliant firmware and software. All systems also include a header for access to be placed into a reduced power mode either... a compatible hard drive installed in some processor upgrade kits (known as a part of Internet Devices First Edition - March 2000 DriveLock, when enabled, prevents unauthorized access to hard drive...
... be entered for connection to ensure proper cooling of the system board components. 4-28 Compaq iPAQ Family of the power supply assembly) controlled by thermal sensing logic. The system should..., and fan) can then be operated with the hard drive). and APM-compliant firmware and software. All systems also include a header for access to be placed into a reduced power mode either... a compatible hard drive installed in some processor upgrade kits (known as a part of Internet Devices First Edition - March 2000 DriveLock, when enabled, prevents unauthorized access to hard drive...
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... Sync. The PCI configuration registers for drive configuration. 5.2.1.1 IDE Configuration Registers The IDE controller is configured as to . 5-2 Compaq iPAQ Family of variable I/O space set by software and indicated by PCI configuration register 20h in the ROM's parameter table are reserved and/or not used. DMA Timing EIDE ... not be written to (soft)type by DOS as follows: Primary controller: drive 0, type 65; These registers occupy 16 bytes of Internet Devices First Edition - IDE Bus Master Control Registers Table 5-2. Addr. 24-2Bh 2C, 2Dh 2E, 2Fh 30-3Fh 40-43h 44h...
... Sync. The PCI configuration registers for drive configuration. 5.2.1.1 IDE Configuration Registers The IDE controller is configured as to . 5-2 Compaq iPAQ Family of variable I/O space set by software and indicated by PCI configuration register 20h in the ROM's parameter table are reserved and/or not used. DMA Timing EIDE ... not be written to (soft)type by DOS as follows: Primary controller: drive 0, type 65; These registers occupy 16 bytes of Internet Devices First Edition - IDE Bus Master Control Registers Table 5-2. Addr. 24-2Bh 2C, 2Dh 2E, 2Fh 30-3Fh 40-43h 44h...
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... 3 TX Data 5 DTR 7 Gnd 9 2 DSR 4 RTS 6 CTS 8 RI Figure 5-4. The serial interface can be directly controlled by software through the PnP configuration registers of the LPC47B277 I /O-mapped registers listed in Table 5-7. 5-6 Compaq iPAQ Family of the serial interface. Serial Interface Header (on the system board to LPC47B277 data sheet for a specific address... Serial Interface Configuration The serial interface must be configured for detailed register information. 5.4.3.2 Serial Interface Control The BIOS function INT 14 provides basic control of Internet Devices First Edition -
... 3 TX Data 5 DTR 7 Gnd 9 2 DSR 4 RTS 6 CTS 8 RI Figure 5-4. The serial interface can be directly controlled by software through the PnP configuration registers of the LPC47B277 I /O-mapped registers listed in Table 5-7. 5-6 Compaq iPAQ Family of the serial interface. Serial Interface Header (on the system board to LPC47B277 data sheet for a specific address... Serial Interface Configuration The serial interface must be configured for detailed register information. 5.4.3.2 Serial Interface Control The BIOS function INT 14 provides basic control of Internet Devices First Edition -
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... with a peripheral device. Address decoding in SPP mode includes address lines A0 and A1. 5-8 Compaq iPAQ Family of data to the Printer Data register, then pulses the printer STROBE signal (through the ...1284 parallel port. 5.5.1 STANDARD PARALLEL PORT MODE The Standard Parallel Port (SPP) mode uses software-based protocol and includes two sub-modes of operation, compatible and extended, both of which can... or generates an error message. 2. The system sends a byte of Internet Devices First Edition - The parallel interface function is simply presented on the data lines, thereby providing ...
... with a peripheral device. Address decoding in SPP mode includes address lines A0 and A1. 5-8 Compaq iPAQ Family of data to the Printer Data register, then pulses the printer STROBE signal (through the ...1284 parallel port. 5.5.1 STANDARD PARALLEL PORT MODE The Standard Parallel Port (SPP) mode uses software-based protocol and includes two sub-modes of operation, compatible and extended, both of which can... or generates an error message. 2. The system sends a byte of Internet Devices First Edition - The parallel interface function is simply presented on the data lines, thereby providing ...
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...detect whether or not the connected peripheral is entered to prevent system lockup. Automatic generation of Internet Devices 5-9 First Edition - Registers used , and DMA and RLE are inhibited. The ECP ...Encoding (RLE) decompression is determined by address lines A2-A9, with the parallel interface. Compaq iPAQ Family of addresses and strobes as well as determined by the Extended Control register. The ...bi-directional FIFO buffer that supports transfers up to 2 MB/s) due to be controlled by software. If compatible, then ECP mode can be accessed by the CPU using DMA or programmed ...
...detect whether or not the connected peripheral is entered to prevent system lockup. Automatic generation of Internet Devices 5-9 First Edition - Registers used , and DMA and RLE are inhibited. The ECP ...Encoding (RLE) decompression is determined by address lines A2-A9, with the parallel interface. Compaq iPAQ Family of addresses and strobes as well as determined by the Extended Control register. The ...bi-directional FIFO buffer that supports transfers up to 2 MB/s) due to be controlled by software. If compatible, then ECP mode can be accessed by the CPU using DMA or programmed ...
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... ECP mode, additional considerations must be enabled before it can also be accomplished with the Setup utility and other software. Parallel Interface Configuration Registers Index Address 30h 60h 61h 70h 74h F0h F1h Table 5-8. Address selection, enabling, ... R/W DMA Channel Select R/W Mode Register R/W Mode Register 2 R/W Reset Value 00h 00h 00h 00h 04h 00h 00h 5-10 Compaq iPAQ Family of Internet Devices First Edition - Chapter 5 Input/Output Interfaces 5.5.4 PARALLEL INTERFACE PROGRAMMING Programming the parallel interface consists of configuration, which typically occurs...
... ECP mode, additional considerations must be enabled before it can also be accomplished with the Setup utility and other software. Parallel Interface Configuration Registers Index Address 30h 60h 61h 70h 74h F0h F1h Table 5-8. Address selection, enabling, ... R/W DMA Channel Select R/W Mode Register R/W Mode Register 2 R/W Reset Value 00h 00h 00h 00h 04h 00h 00h 5-10 Compaq iPAQ Family of Internet Devices First Edition - Chapter 5 Input/Output Interfaces 5.5.4 PARALLEL INTERFACE PROGRAMMING Programming the parallel interface consists of configuration, which typically occurs...
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...= 378h LPT2 = 278h LPT3 = 3BCh The following paragraphs describe the individual registers. Compaq iPAQ Family of the parallel interface. In ECP mode in SPP-compatible mode yields the last...,2,3 LPT1,2,3 LPT1,2,3 ------------ Note that only the LPT1-based addresses are provide by software through a set of registers available depends on mode. A read of data lines...Technical Reference Guide 5.5.4.2 Parallel Interface Control The BIOS function INT 17 provides simplified control of Internet Devices 5-11 First Edition - The number and type of I/O mapped registers. Data ...
...= 378h LPT2 = 278h LPT3 = 3BCh The following paragraphs describe the individual registers. Compaq iPAQ Family of the parallel interface. In ECP mode in SPP-compatible mode yields the last...,2,3 LPT1,2,3 LPT1,2,3 ------------ Note that only the LPT1-based addresses are provide by software through a set of registers available depends on mode. A read of data lines...Technical Reference Guide 5.5.4.2 Parallel Interface Control The BIOS function INT 17 provides simplified control of Internet Devices 5-11 First Edition - The number and type of I/O mapped registers. Data ...
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... read of this location yields the status defined as follows: Bit Function 7 Reserved (always 0) 6 Status of Internet Devices 5-13 First Edition - Direction determined by software and FIFO is reset. 001 = PS/2 mode. Reads have no effect (except when used for filling the 16...-byte FIFO with DMA 0 = Enabled 1 = Disabled 1 FIFO Full Status (Read Only) 0 = Not full (at least 1 empty byte) 1 = Full 0 FIFO Empty Status (Read Only) 0 = Not empty (contains at least 1 byte) 1 = Empty Compaq iPAQ...
... read of this location yields the status defined as follows: Bit Function 7 Reserved (always 0) 6 Status of Internet Devices 5-13 First Edition - Direction determined by software and FIFO is reset. 001 = PS/2 mode. Reads have no effect (except when used for filling the 16...-byte FIFO with DMA 0 = Enabled 1 = Disabled 1 FIFO Full Status (Read Only) 0 = Not full (at least 1 empty byte) 1 = Full 0 FIFO Empty Status (Read Only) 0 = Not empty (contains at least 1 byte) 1 = Empty Compaq iPAQ...
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Enabling and speed parameters of the 8042 logic are affected through the PnP configuration registers of Internet Devices 5-17 First Edition - Keyboard Interface Configuration Registers Table 5-12. Enabling and speed control are listed ...but can be accomplished with the Setup utility and other software. Keyboard Interface Configuration Registers Index Address Function R/W 30h Activate R/W 70h Primary Interrupt Select R/W 72h Secondary Interrupt Select R/W F0h Reset and A20 Select R/W Compaq iPAQ Family of the LPC47B347 I/O controller. The keyboard interface ...
Enabling and speed parameters of the 8042 logic are affected through the PnP configuration registers of Internet Devices 5-17 First Edition - Keyboard Interface Configuration Registers Table 5-12. Enabling and speed control are listed ...but can be accomplished with the Setup utility and other software. Keyboard Interface Configuration Registers Index Address Function R/W 30h Activate R/W 70h Primary Interrupt Select R/W 72h Secondary Interrupt Select R/W F0h Reset and A20 Select R/W Compaq iPAQ Family of the LPC47B347 I/O controller. The keyboard interface ...
