Aspire M5620 Service Guide
Page 39
... amounts of the [Enabled], Instructions processor's SSE and SSE2 instruction sets. [Disabled] When enabled, the processor's SSE and SSE2 instruction sets are disabled. It is Hyper Transport between CPU and [Disabled] North Bridge. However, the processor's MMX instruction set will not be available for use. Enabling pulse spectrum spread modulation changes...
... amounts of the [Enabled], Instructions processor's SSE and SSE2 instruction sets. [Disabled] When enabled, the processor's SSE and SSE2 instruction sets are disabled. It is Hyper Transport between CPU and [Disabled] North Bridge. However, the processor's MMX instruction set will not be available for use. Enabling pulse spectrum spread modulation changes...