Veriton 2800 Service Guide
Page 57
...R/W functionality Early chipset initialization: -Disable shadow RAM -Disable L2 cache (socket 7 or below) -Program basic chipset registers Detect memory -Auto-detection of DRAM size, type and ECC. -Auto-detection of preset numbers called check points to E000 & F000 shadow ... T I/O ports T One parallel port T One PS/2-compatible mouse port T One PS/2-compatible keyboard port NOTE: When Post executes a task, it is a BIOS procedure that are not listed in numeric co-processor and cache memory subsystem T Direct Memory Access (DMA) controller T Interrupt system T Three programmable timers...
...R/W functionality Early chipset initialization: -Disable shadow RAM -Disable L2 cache (socket 7 or below) -Program basic chipset registers Detect memory -Auto-detection of DRAM size, type and ECC. -Auto-detection of preset numbers called check points to E000 & F000 shadow ... T I/O ports T One parallel port T One PS/2-compatible mouse port T One PS/2-compatible keyboard port NOTE: When Post executes a task, it is a BIOS procedure that are not listed in numeric co-processor and cache memory subsystem T Direct Memory Access (DMA) controller T Interrupt system T Three programmable timers...