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...for simultaneous reads and writes, the total peak bandwidth is standard in all AMD-K6 family processors. technology in the lowpower versions of the processor and complementing the 64-Kbyte L1 cache, which further enhances overall CPU throughput. s The standard-power version has a 2.0-V core voltage and ...doubled to 7,200 Mbytes/s, resulting in a maximum peak bandwidth nine times as large as a 100-MHz cache implementation. 4 AMD-K6™-2E+ Embedded Processor Chapter 1 In addition, the processor core can access both the 64-Kbyte L1 cache and the 128-Kbyte L2 cache to be processed ...
...for simultaneous reads and writes, the total peak bandwidth is standard in all AMD-K6 family processors. technology in the lowpower versions of the processor and complementing the 64-Kbyte L1 cache, which further enhances overall CPU throughput. s The standard-power version has a 2.0-V core voltage and ...doubled to 7,200 Mbytes/s, resulting in a maximum peak bandwidth nine times as large as a 100-MHz cache implementation. 4 AMD-K6™-2E+ Embedded Processor Chapter 1 In addition, the processor core can access both the 64-Kbyte L1 cache and the 128-Kbyte L2 cache to be processed ...
User Guide
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...outputs are supported on the low-power versions only of the DC/DC regulator that these signals, see the Embedded AMD-K6™ Processors BIOS Design Guide Application Note, order# 23913. Chapter 5 Signal Descriptions 137 For more information about these pins are...RESET is sampled asserted, the CPU input clock is sampled asserted. 23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 5.53 VID[4:0] (Voltage Identification) Pin Attribute Summary Output For AMD PowerNow! technology-enabled processors, the VID[4:0] signals are ...
...outputs are supported on the low-power versions only of the DC/DC regulator that these signals, see the Embedded AMD-K6™ Processors BIOS Design Guide Application Note, order# 23913. Chapter 5 Signal Descriptions 137 For more information about these pins are...RESET is sampled asserted, the CPU input clock is sampled asserted. 23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 5.53 VID[4:0] (Voltage Identification) Pin Attribute Summary Output For AMD PowerNow! technology-enabled processors, the VID[4:0] signals are ...
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x means "don't care" Generated by the CPU Generated by System Logic M/IO# 1 1 1 0 0 0 0 1 1 1 1 1 D/C# 0 0 0 0 0 1 1 1 1 1 1 1 W/R# 0 0 0 1 0 0 1 0 0 0 1 1 CACHE# 0 1 x 1 1 1 1 0 1 x 0 1 KEN# 0 x1 1 x x x x 0 x 1 x x Table 24. Supported on the low-power versions... A4 BE7# BE6# BE5# BE4# BE3# BE2# BE1# BE0# M/IO# D/C# W/R# CACHE# KEN# 142 Signal Descriptions Chapter 5 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 23542A/0-September 2000 5.57 Bus Cycle Definitions Table 23. Bus Cycle Definition Bus Cycle Initiated Code Read, L1 Instruction Cache and L2...
x means "don't care" Generated by the CPU Generated by System Logic M/IO# 1 1 1 0 0 0 0 1 1 1 1 1 D/C# 0 0 0 0 0 1 1 1 1 1 1 1 W/R# 0 0 0 1 0 0 1 0 0 0 1 1 CACHE# 0 1 x 1 1 1 1 0 1 x 0 1 KEN# 0 x1 1 x x x x 0 x 1 x x Table 24. Supported on the low-power versions... A4 BE7# BE6# BE5# BE4# BE3# BE2# BE1# BE0# M/IO# D/C# W/R# CACHE# KEN# 142 Signal Descriptions Chapter 5 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 23542A/0-September 2000 5.57 Bus Cycle Definitions Table 23. Bus Cycle Definition Bus Cycle Initiated Code Read, L1 Instruction Cache and L2...
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...dynamically controlled through AMD PowerNow! s The SMM handler initiates core voltage and frequency transitions by the external bus frequency to the processor's internal PLL. s This action automatically places the processor into the EPM Stop Grant State and transitions the CPU core voltage ... 149 lists valid EBF[2:0] states and equivalent processor-to the Stop Grant Time-Out Counter (SGTC) field. Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 23542A/0-September 2000 6.2 Dynamic Core Frequency and Core Voltage Control AMD PowerNow! s At the fall of RESET,...
...dynamically controlled through AMD PowerNow! s The SMM handler initiates core voltage and frequency transitions by the external bus frequency to the processor's internal PLL. s This action automatically places the processor into the EPM Stop Grant State and transitions the CPU core voltage ... 149 lists valid EBF[2:0] states and equivalent processor-to the Stop Grant Time-Out Counter (SGTC) field. Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 23542A/0-September 2000 6.2 Dynamic Core Frequency and Core Voltage Control AMD PowerNow! s At the fall of RESET,...
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AMD PowerNow! s This action automatically places the processor into the EPM Stop Grant state and transitions the CPU core voltage and frequency to vary the regulator output voltage. s For those regulators that supplies the processor core voltage. s To change the processor core ...BVC field of the core voltage. 23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet Dynamic Core Frequency Control Voltage Identification (VID) Outputs For AMD PowerNow! technology-enabled processors feature Voltage ID (VID) outputs to support dynamic control of...
AMD PowerNow! s This action automatically places the processor into the EPM Stop Grant state and transitions the CPU core voltage and frequency to vary the regulator output voltage. s For those regulators that supplies the processor core voltage. s To change the processor core ...BVC field of the core voltage. 23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet Dynamic Core Frequency Control Voltage Identification (VID) Outputs For AMD PowerNow! technology-enabled processors feature Voltage ID (VID) outputs to support dynamic control of...
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AMD-K6™-2E+ Embedded Processor Valid Ordering Part Number Combinations Device Type OPN1 Package Type Operating Voltage Case Maximum CPU/Bus Temperature Frequency AMD-K6-2E+/350AUZ 321-pin CPGA 1.4 V-1.6 V (Core) 3.135 V-3.6 V (I/O) 0°C - 85°C 350 MHz/100 MHz AMD-K6-2E+/400ATZ 321-pin CPGA 1.5 V-1.7 V (Core) 3.135 V-3.6 V (I/O) 0°C - 85°C 400 MHz/100 MHz Low Power AMD-K6-2E+/450APZ 321-pin CPGA 1.6 V-1.8 V (Core...
AMD-K6™-2E+ Embedded Processor Valid Ordering Part Number Combinations Device Type OPN1 Package Type Operating Voltage Case Maximum CPU/Bus Temperature Frequency AMD-K6-2E+/350AUZ 321-pin CPGA 1.4 V-1.6 V (Core) 3.135 V-3.6 V (I/O) 0°C - 85°C 350 MHz/100 MHz AMD-K6-2E+/400ATZ 321-pin CPGA 1.5 V-1.7 V (Core) 3.135 V-3.6 V (I/O) 0°C - 85°C 400 MHz/100 MHz Low Power AMD-K6-2E+/450APZ 321-pin CPGA 1.6 V-1.8 V (Core...