Manual/User Guide
Page 36
Thus, it the cause of the disk drive. C141-E070-01EN 2-5 The disk drive is an abbreviation of address decoder, driver, and receiver. At high speed data transfer (PIO mode 3, mode 4, or DMA mode 2 U-DMA mode 2),... the ATA-4 standard, and the cable length between the HA and the disk drive should be a great cause of the obstruction of the signal lines (AT bus) between the HA and the disk... drive may be as short as possible. 2.2 System Configuration HA (host adaptor) consists of "AT attachment". ...
Thus, it the cause of the disk drive. C141-E070-01EN 2-5 The disk drive is an abbreviation of address decoder, driver, and receiver. At high speed data transfer (PIO mode 3, mode 4, or DMA mode 2 U-DMA mode 2),... the ATA-4 standard, and the cable length between the HA and the disk drive should be a great cause of the obstruction of the signal lines (AT bus) between the HA and the disk... drive may be as short as possible. 2.2 System Configuration HA (host adaptor) consists of "AT attachment". ...
Manual/User Guide
Page 55
...01EN The servo information is the read output from the head. Theory of Device Operation 4.3 Circuit Configuration Figure 4.2 shows the disk drive circuit configuration. (1) Read/write circuit The read channel (RDC). The PreAMP consists of the write current switch circuit, that flows ...and the voltage amplifier circuit, that amplitudes the read demodulation circuit using the servo information recorded on the media surface. (3) Spindle motor driver circuit The circuit measures the interval of a PHASE signal generated by 2 closed-loop servo using the extended partial response class 4 ...
...01EN The servo information is the read output from the head. Theory of Device Operation 4.3 Circuit Configuration Figure 4.2 shows the disk drive circuit configuration. (1) Read/write circuit The read channel (RDC). The PreAMP consists of the write current switch circuit, that flows ...and the voltage amplifier circuit, that amplitudes the read demodulation circuit using the servo information recorded on the media surface. (3) Spindle motor driver circuit The circuit measures the interval of a PHASE signal generated by 2 closed-loop servo using the extended partial response class 4 ...
Manual/User Guide
Page 68
... by converting the VCM current into the motor coil according to the differentation (abberration). (6) Driver circuit The driver circuit is recognized by the MPU as position information with A-B and C-D processed. (3) D/A converter (DAC) The D/A converter (DAC) converts the VCM drive current value (digital value) calculated by the DSP unit into analog values and transfers...
... by converting the VCM current into the motor coil according to the differentation (abberration). (6) Driver circuit The driver circuit is recognized by the MPU as position information with A-B and C-D processed. (3) D/A converter (DAC) The D/A converter (DAC) converts the VCM drive current value (digital value) calculated by the DSP unit into analog values and transfers...
Manual/User Guide
Page 71
... twelve-pole motor is used for the spindle motor, and the 3phase full/half-wave analog current control circuit is used as the spindle motor driver (called SVC hereafter). Then, a current (approx. 0.7 A) flows into the D/A converter. The MPU feeds the VCM current via the D/A converter and power amplifier to... the disk. The MPU then feeds the VCM drive current by Fujitsu. The calculation is digitally executed by itself, and changes the phase of the current flowed in the motor in the order of (V-phase to...
... twelve-pole motor is used for the spindle motor, and the 3phase full/half-wave analog current control circuit is used as the spindle motor driver (called SVC hereafter). Then, a current (approx. 0.7 A) flows into the D/A converter. The MPU feeds the VCM current via the D/A converter and power amplifier to... the disk. The MPU then feeds the VCM drive current by Fujitsu. The calculation is digitally executed by itself, and changes the phase of the current flowed in the motor in the order of (V-phase to...
Manual/User Guide
Page 173
... 1) MLI tUI 0 0 0 Unlimited interlock time (see Note 1) tAZ 10 10 10 Maximum time allowed for output drivers to release (from being asserted or negated) tZAH 20 20 20 Minimum delay time required for t 0 ZAD 0 0 output drivers to assert or negate (from released state) tENV 20 70 20 70 20 70 Envelope time...
... 1) MLI tUI 0 0 0 Unlimited interlock time (see Note 1) tAZ 10 10 10 Maximum time allowed for output drivers to release (from being asserted or negated) tZAH 20 20 20 Minimum delay time required for t 0 ZAD 0 0 output drivers to assert or negate (from released state) tENV 20 70 20 70 20 70 Envelope time...
Manual/User Guide
Page 210
... registers. Interfaces based on the AT bus. The master is for drives The BIOS standard collectively refers to the parameters defined by different vendors. Command Commands are instructions to input data to protect these drivers. Master (Device 0) The master is sealed to and output data from... dust. C141-E070-01EN GL-1 The DE is the first drive that can operate on this standard are written in conformity with the...
... registers. Interfaces based on the AT bus. The master is for drives The BIOS standard collectively refers to the parameters defined by different vendors. Command Commands are instructions to input data to protect these drivers. Master (Device 0) The master is sealed to and output data from... dust. C141-E070-01EN GL-1 The DE is the first drive that can operate on this standard are written in conformity with the...
Manual/User Guide
Page 217
... to reset 6-2 DF 5-12 Diagnostic code 5-9 Dimension 3-2 Disk 2-2, 4-2 Disk enclosure 2-4 Disk media 2-3 DMA data transfer command 5-78 DMA data transfer protocol 5-78 DRDY 5-11 Driver 4-17 Driver circuit 4-17 DRQ 5-12 DSC 5-12 E Environmental specification 1-7 ERR 5-12 Error correction by ECC 1-3 Error correction by retry 1-3 Error posting 5-71 Error rate 1-9 Error register...
... to reset 6-2 DF 5-12 Diagnostic code 5-9 Dimension 3-2 Disk 2-2, 4-2 Disk enclosure 2-4 Disk media 2-3 DMA data transfer command 5-78 DMA data transfer protocol 5-78 DRDY 5-11 Driver 4-17 Driver circuit 4-17 DRQ 5-12 DSC 5-12 E Environmental specification 1-7 ERR 5-12 Error correction by ECC 1-3 Error correction by retry 1-3 Error posting 5-71 Error rate 1-9 Error register...
Manual/User Guide
Page 219
...41 Shock 1-8 Signal assignment on connector 5-2 Single word DMA data transfer 5-82 Single word DMA data transfer timing 5-82 Slave 1-3 Slave drive setting 3-12 SLEEP 5-54 Sleep mode 6-11 SMART 5-54 Spare area 6-12 Specification summary 1-4 Spindle 4-3 Spindle motor 2-3 Spindle motor control... 4-17, 4-20 Spindle motor control circuit 4-17 Spindle motor driver circuit 4-4 Spindle motor start 4-15 SRST 5-13 Stable rotation mode 4-21 Standard value, surface 3-7 STANDBY 5-52 STANDBY IMMEDIATE 5-53 Standby ...
...41 Shock 1-8 Signal assignment on connector 5-2 Single word DMA data transfer 5-82 Single word DMA data transfer timing 5-82 Slave 1-3 Slave drive setting 3-12 SLEEP 5-54 Sleep mode 6-11 SMART 5-54 Spare area 6-12 Specification summary 1-4 Spindle 4-3 Spindle motor 2-3 Spindle motor control... 4-17, 4-20 Spindle motor control circuit 4-17 Spindle motor driver circuit 4-4 Spindle motor start 4-15 SRST 5-13 Stable rotation mode 4-21 Standard value, surface 3-7 STANDBY 5-52 STANDBY IMMEDIATE 5-53 Standby ...