User Guide
Page 57
... the timing of the system BIOS ROM at C0000h to 3-13 Setting options: Enabled, Disabled. Setting options: 2, 3. DRAM Data Integrity Mode Select ECC (Error-Checking & Correcting Code) or Non-ECC according to CAS (column address strobe). Video BIOS Cacheable Selecting Enabled allows caching of clock cycles for the RAS to precharge. Selecting...
... the timing of the system BIOS ROM at C0000h to 3-13 Setting options: Enabled, Disabled. Setting options: 2, 3. DRAM Data Integrity Mode Select ECC (Error-Checking & Correcting Code) or Non-ECC according to CAS (column address strobe). Video BIOS Cacheable Selecting Enabled allows caching of clock cycles for the RAS to precharge. Selecting...
User Guide
Page 78
...special circuitry for storing information about three to the microprocessor. In addition, it to be erased by Western Digital Corporation. Glossary ECC Memory (Error Correcting Code Memory) A type of memory that supports transfer rates of 33 MBps. Also like other types of... your computer External Cache Short for Electrically Erasable Programmable Read-Only Memory. Because of PROM, EEPROM retains its PS/2 computers. EISA (Extended Industry Standard Architecture) EISA is a standard bus (computer interconnection) architecture that is a special type of PROM that can reach a...
...special circuitry for storing information about three to the microprocessor. In addition, it to be erased by Western Digital Corporation. Glossary ECC Memory (Error Correcting Code Memory) A type of memory that supports transfer rates of 33 MBps. Also like other types of... your computer External Cache Short for Electrically Erasable Programmable Read-Only Memory. Because of PROM, EEPROM retains its PS/2 computers. EISA (Extended Industry Standard Architecture) EISA is a standard bus (computer interconnection) architecture that is a special type of PROM that can reach a...