User Guide
Page 57
... the RAS to determine the timing of DRAM installed. BIOS Setup module. This setup item allows you to accumulate its charge before SDRAM starts a read command after receiving it. If insufficient time is refreshed, both rows and columns are addressed separately. However, if any program writes to this memory area, a system...
... the RAS to determine the timing of DRAM installed. BIOS Setup module. This setup item allows you to accumulate its charge before SDRAM starts a read command after receiving it. If insufficient time is refreshed, both rows and columns are addressed separately. However, if any program writes to this memory area, a system...
User Guide
Page 61
...onboard IDE interface supports. Reboots the computer. BIOS Setup Off On Former-Sts Leaves the computer in the power off state. IDE Primary/Secondary Master/Slave PIO The four items allow you to the status before power failure or interrupt occurs. On-Chip Primary/Secondary PCI IDE The integrated ...peripheral controller contains an IDE interface with support for two IDE channels. IDE Primary/Secondary Master/Slave UDMA Ultra DMA implementation is also called block transfer, multiple commands or multiple sector read/write.
...onboard IDE interface supports. Reboots the computer. BIOS Setup Off On Former-Sts Leaves the computer in the power off state. IDE Primary/Secondary Master/Slave PIO The four items allow you to the status before power failure or interrupt occurs. On-Chip Primary/Secondary PCI IDE The integrated ...peripheral controller contains an IDE interface with support for two IDE channels. IDE Primary/Secondary Master/Slave UDMA Ultra DMA implementation is also called block transfer, multiple commands or multiple sector read/write.
User Guide
Page 67
... the PCI VGA device's palette registers and the ISA VGA device's palette registers, permitting the palette registers of palette registers on the type of the command register in the computer (one PCI and one ISA) and the: VGA Palette Snoop Bit Setting Action Disabled Data read or written by the CPU...
... the PCI VGA device's palette registers and the ISA VGA device's palette registers, permitting the palette registers of palette registers on the type of the command register in the computer (one PCI and one ISA) and the: VGA Palette Snoop Bit Setting Action Disabled Data read or written by the CPU...