Product Specification
Page 63
When the BIOS Setup configuration jumper is set to configure mode and the computer is powered-up, the BIOS compares the CPU version and the microcode version in configure mode. Maintenance Main Configuration Performance Security Power Boot Exit NOTE The maintenance menu is displayed only ... 63 3 Overview of BIOS and a revision code. The BIOS displays a message during POST identifying the type of BIOS Features 3.1 Introduction The board uses an Intel BIOS that is in the BIOS and reports if the two match. The SPI Flash contains the BIOS Setup program, POST, the PCI auto-configuration...
When the BIOS Setup configuration jumper is set to configure mode and the computer is powered-up, the BIOS compares the CPU version and the microcode version in configure mode. Maintenance Main Configuration Performance Security Power Boot Exit NOTE The maintenance menu is displayed only ... 63 3 Overview of BIOS and a revision code. The BIOS displays a message during POST identifying the type of BIOS Features 3.1 Introduction The board uses an Intel BIOS that is in the BIOS and reports if the two match. The SPI Flash contains the BIOS Setup program, POST, the PCI auto-configuration...
Product Specification
Page 77
... APs 0x46 End CPU SMM Init CPU DXE Phase 0x47 CPU DXE Phase begin 0x48 Refresh memory space attributes according to MTRRs 0x49 Load the microcode if needed 0x4A Initialize strings to HII database 0x4B Initialize MP Support 0x4C CPU DXE Phase End CPU DXE SMM Phase 0x4D CPU DXE SMM Phase... begin 0x4E Relocate SM bases for all APs 0x4F CPU DXE SMM Phase end IO BUSES 0x50 Enumerating PCI buses 0x51 Allocating ...
... APs 0x46 End CPU SMM Init CPU DXE Phase 0x47 CPU DXE Phase begin 0x48 Refresh memory space attributes according to MTRRs 0x49 Load the microcode if needed 0x4A Initialize strings to HII database 0x4B Initialize MP Support 0x4C CPU DXE Phase End CPU DXE SMM Phase 0x4D CPU DXE SMM Phase... begin 0x4E Relocate SM bases for all APs 0x4F CPU DXE SMM Phase end IO BUSES 0x50 Enumerating PCI buses 0x51 Allocating ...