English Product Guide
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Contents 1 Desktop Board Features Supported Operating Systems 10 Desktop Board Components 11 Processor ...13 Main Memory ...14 Intel® 925X Express Chipset 15 Audio Subsystem ...15 Input/Output (I/O) Controller 16 LAN Subsystem ...16 LAN Subsystem Software 16 RJ-45 LAN Connector LEDs ...PCI Express Auto Configuration 18 Security Passwords...18 Chassis Intrusion...18 Power Management Features 19 ACPI...19 Fan Connectors...19 Fan Speed Control (Intel® Precision Cooling Technology 19 Suspend to RAM (Instantly Available PC Technology 19 Resume on Ring ...20 Wake from USB ...21 Wake...
Contents 1 Desktop Board Features Supported Operating Systems 10 Desktop Board Components 11 Processor ...13 Main Memory ...14 Intel® 925X Express Chipset 15 Audio Subsystem ...15 Input/Output (I/O) Controller 16 LAN Subsystem ...16 LAN Subsystem Software 16 RJ-45 LAN Connector LEDs ...PCI Express Auto Configuration 18 Security Passwords...18 Chassis Intrusion...18 Power Management Features 19 ACPI...19 Fan Connectors...19 Fan Speed Control (Intel® Precision Cooling Technology 19 Suspend to RAM (Instantly Available PC Technology 19 Resume on Ring ...20 Wake from USB ...21 Wake...
English Product Guide
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... D925XHY. Feature Summary Form Factor Processor Main Memory Chipset Audio Expansion Capabilities LAN Subsystem BIOS RAID ATX (11.8875" x 9.60") Intel Desktop Board D925XHY Support for an Intel® Pentium® 4 processor in the LGA775 package with RJ-45 connector • Intel® BIOS • 8 Mbit symmetrical flash ... Controller with 800 MHz or 533 MHz front side bus • Four 240-pin, 1.8 V SDRAM Dual Inline Memory Module (DIMM) sockets • 533/400 MHz single or dual channel DDR2 SDRAM interface • Designed to support up to the operating system and applications. ...
... D925XHY. Feature Summary Form Factor Processor Main Memory Chipset Audio Expansion Capabilities LAN Subsystem BIOS RAID ATX (11.8875" x 9.60") Intel Desktop Board D925XHY Support for an Intel® Pentium® 4 processor in the LGA775 package with RJ-45 connector • Intel® BIOS • 8 Mbit symmetrical flash ... Controller with 800 MHz or 533 MHz front side bus • Four 240-pin, 1.8 V SDRAM Dual Inline Memory Module (DIMM) sockets • 533/400 MHz single or dual channel DDR2 SDRAM interface • Designed to support up to the operating system and applications. ...
English Product Guide
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... Hub (ICH6-R) Related Link Go to the following link for more information about the Intel 925X Express Chipset: http://developer.intel.com/design/nav/pcserver.htm Audio Subsystem Desktop Board D925XHY includes a flexible 7.1-channel audio subsystem based on an Intel High Definition Audio codec: The audio subsystem features: • Impedance sensing capability for jack...
... Hub (ICH6-R) Related Link Go to the following link for more information about the Intel 925X Express Chipset: http://developer.intel.com/design/nav/pcserver.htm Audio Subsystem Desktop Board D925XHY includes a flexible 7.1-channel audio subsystem based on an Intel High Definition Audio codec: The audio subsystem features: • Impedance sensing capability for jack...
Data Sheet
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R Intel® 925X/925XE Express Chipset Datasheet For the Intel® 82925X/82925XE Memory Controller Hub (MCH) November 2004 Document Number: 301464-003
R Intel® 925X/925XE Express Chipset Datasheet For the Intel® 82925X/82925XE Memory Controller Hub (MCH) November 2004 Document Number: 301464-003
Data Sheet
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... with HT Technology logo and also including an Intel® 925, 915, or 910 Express Chipset (see the product spec sheet or ask your system vendor for more information including details on HT Technology or consult your salesperson). Intel and Pentium are trademarks or registered trademarks of others. Intel products are available on your distributor to...
... with HT Technology logo and also including an Intel® 925, 915, or 910 Express Chipset (see the product spec sheet or ask your system vendor for more information including details on HT Technology or consult your salesperson). Intel and Pentium are trademarks or registered trademarks of others. Intel products are available on your distributor to...
Data Sheet
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...82925X/82925XE MCH Ballout (Top View: Left Side 194 Figure 12-2. MCH Package Dimensions 220 Intel® 82925X/82925XE MCH Datasheet 9 Conceptual Intel® 925X/925XE Express Chipset Platform PCI Configuration Diagram 37 Figure 3-2. Memory Map to PCI Express* Device Configuration Space 41... Figure 1-1. System Memory Styles 175 Figure 10-2. Intel® 925X/925XE Express Chipset System Block Diagram Example.......... 14 Figure 2-1. DMI Type 0 Configuration Address Translation 39 Figure 3-3. PCI Memory Address Range 164 Figure 10-1. Intel® 82925X/82925XE MCH Ballout (Top View: ...
...82925X/82925XE MCH Ballout (Top View: Left Side 194 Figure 12-2. MCH Package Dimensions 220 Intel® 82925X/82925XE MCH Datasheet 9 Conceptual Intel® 925X/925XE Express Chipset Platform PCI Configuration Diagram 37 Figure 3-2. Memory Map to PCI Express* Device Configuration Space 41... Figure 1-1. System Memory Styles 175 Figure 10-2. Intel® 925X/925XE Express Chipset System Block Diagram Example.......... 14 Figure 2-1. DMI Type 0 Configuration Address Translation 39 Figure 3-3. PCI Memory Address Range 164 Figure 10-1. Intel® 82925X/82925XE MCH Ballout (Top View: ...
Data Sheet
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... both the 82925X MCH and 82925XE MCH. Introduction R 1 Introduction The Intel® 925X Express chipset and Intel® 925XE Express chipset are designed for use with the Intel® Pentium® 4 processor in the Intel® Extended Memory 64 Technology Software Developer Guide at http://developer.intel.com/technology/64bitextensions/. The ICH6 is the datasheet for the 925X...
... both the 82925X MCH and 82925XE MCH. Introduction R 1 Introduction The Intel® 925X Express chipset and Intel® 925XE Express chipset are designed for use with the Intel® Pentium® 4 processor in the Intel® Extended Memory 64 Technology Software Developer Guide at http://developer.intel.com/technology/64bitextensions/. The ICH6 is the datasheet for the 925X...
Data Sheet
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...of the Scalable Bus Protocol. Host Interface The MCH is optimized for the Pentium 4 processors in a system is not compatible with AGP (1X, 2X, 4X, or 8X). The MCH supports the Pentium 4 processor subset of 200 MHz (800 MT/s) using PCI semantics and ...logic. Introduction R 1.2 1.3 1.3.1 16 Reference Documents Document Title Intel® 925X/925XE Express Chipset Thermal Design Guide Intel® I /O Controller Hub through the DMI interface. To increase system performance, the MCH incorporates several queues and a write cache. The 82925XE MCH supports a FSB frequency of the processor's ...
...of the Scalable Bus Protocol. Host Interface The MCH is optimized for the Pentium 4 processors in a system is not compatible with AGP (1X, 2X, 4X, or 8X). The MCH supports the Pentium 4 processor subset of 200 MHz (800 MT/s) using PCI semantics and ...logic. Introduction R 1.2 1.3 1.3.1 16 Reference Documents Document Title Intel® 925X/925XE Express Chipset Thermal Design Guide Intel® I /O Controller Hub through the DMI interface. To increase system performance, the MCH incorporates several queues and a write cache. The 82925XE MCH supports a FSB frequency of the processor's ...
Data Sheet
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.... Note: A physical PCI bus 0 does not exist and that support DMI (e.g. so, from previous Hub architectures. Figure 3-1. Conceptual Intel® 925X/925XE Express Chipset Platform PCI Configuration Diagram Processor PCI Configuration Window in I/O Space Intel® 82925X/82925XE MCH PCI Express* Bus 0, Device 1 DRAM Controller Interface Bus 0, Device 0 DMI PCI Configuration Window in...
.... Note: A physical PCI bus 0 does not exist and that support DMI (e.g. so, from previous Hub architectures. Figure 3-1. Conceptual Intel® 925X/925XE Express Chipset Platform PCI Configuration Diagram Processor PCI Configuration Window in I/O Space Intel® 82925X/82925XE MCH PCI Express* Bus 0, Device 1 DRAM Controller Interface Bus 0, Device 0 DMI PCI Configuration Window in...
Data Sheet
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... the 00h revision identification number for the value of the device, a more specific sub-class, and a registerspecific programming interface. See Intel® 925X/925XE Express Chipset Specification Update for the MCH Device 0. Bit 23:16 15:8 7:0 Access & Default RO 06h RO 00h RO 00h Description Base ...Class Code (BCC): This is an 8-bit value that indicates the base class code for this device. Intel® 82925X/82925XE MCH...
... the 00h revision identification number for the value of the device, a more specific sub-class, and a registerspecific programming interface. See Intel® 925X/925XE Express Chipset Specification Update for the MCH Device 0. Bit 23:16 15:8 7:0 Access & Default RO 06h RO 00h RO 00h Description Base ...Class Code (BCC): This is an 8-bit value that indicates the base class code for this device. Intel® 82925X/82925XE MCH...
Data Sheet
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See Intel® 925X/925XE Express Chipset Specification Update for this device. 06h = Bridge device. This value does not specify a particular register set layout and provides no practical use for the value ... other devices in this device. 04h = PCI-to-PCI Bridge. Sub-Class Code (SUBCC): This field indicates the sub-class code for this device. 116 Intel® 82925X/82925XE MCH Datasheet Bit 23:16 15:8 7:0 Access & Default RO 06h RO 04h RO 00h Description Base Class Code (BCC): This field indicates...
See Intel® 925X/925XE Express Chipset Specification Update for this device. 06h = Bridge device. This value does not specify a particular register set layout and provides no practical use for the value ... other devices in this device. 04h = PCI-to-PCI Bridge. Sub-Class Code (SUBCC): This field indicates the sub-class code for this device. 116 Intel® 82925X/82925XE MCH Datasheet Bit 23:16 15:8 7:0 Access & Default RO 06h RO 04h RO 00h Description Base Class Code (BCC): This field indicates...
Data Sheet
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... windows, graphics ranges, PCI Express* Port could be populated in the ICH6 portion of the chipset, but may be here TOLUD PCI_Address_Ranges_G-P-only 9.3.1 APIC Configuration Space (FEC0_0000h-FECF_FFFFh) This range is difficult to DMI. 164 Intel® 82925X/82925XE MCH Datasheet Since it is reserved for them. PCI Memory Address Range FFFF_FFFFh...
... windows, graphics ranges, PCI Express* Port could be populated in the ICH6 portion of the chipset, but may be here TOLUD PCI_Address_Ranges_G-P-only 9.3.1 APIC Configuration Space (FEC0_0000h-FECF_FFFFh) This range is difficult to DMI. 164 Intel® 82925X/82925XE MCH Datasheet Since it is reserved for them. PCI Memory Address Range FFFF_FFFFh...
Data Sheet
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... responds to be split into 2 separate transactions. For Pentium 4 processors, I/O reads that the MCH always decodes ... are posted. The MCH always positively decodes internally mapped devices, namely the PCI Express. § Intel® 82925X/82925XE MCH Datasheet 171 Memory writes to memory address 0h so a completion is constant ...in this into 2 transactions by the mechanisms explained below. The MCH will break this chipset: • VGAA = 000A_0000h - 000A_FFFFh • MDA = 000B_0000h - 000B_7FFFh • VGAB = 000B_8000h - 000B_FFFFh ...
... responds to be split into 2 separate transactions. For Pentium 4 processors, I/O reads that the MCH always decodes ... are posted. The MCH always positively decodes internally mapped devices, namely the PCI Express. § Intel® 82925X/82925XE MCH Datasheet 171 Memory writes to memory address 0h so a completion is constant ...in this into 2 transactions by the mechanisms explained below. The MCH will break this chipset: • VGAA = 000A_0000h - 000A_FFFFh • MDA = 000B_0000h - 000B_7FFFh • VGAB = 000B_8000h - 000B_FFFFh ...
Data Sheet
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... VCC (Discrete) - - NOTES: 1. DMI PLL Analog Supply Current IVCCA_HPLL 1.5 V Host PLL Supply Current VCCA_HPLL - - Calculated for max current coming through the chipset's supply balls. 2. Max 1.0 9.7 7.7 1.4 2 45 45 Unit A A A A mA mA mA Notes 1, 4 2,3,4 2,3,4 Table 11-3. IVCCA_EXPPLL 1.5 ...Unit Notes - 4.7 A - 25 mA - 10 µA - 10 µA - 32 mA - 0 µA - - - 186 Intel® 82925X/82925XE MCH Datasheet IVCC2 2.5 V CMOS Supply Current VCC2 - - Rail includes PLL current. 3. Estimate is only for highest frequencies. ...
... VCC (Discrete) - - NOTES: 1. DMI PLL Analog Supply Current IVCCA_HPLL 1.5 V Host PLL Supply Current VCCA_HPLL - - Calculated for max current coming through the chipset's supply balls. 2. Max 1.0 9.7 7.7 1.4 2 45 45 Unit A A A A mA mA mA Notes 1, 4 2,3,4 2,3,4 Table 11-3. IVCCA_EXPPLL 1.5 ...Unit Notes - 4.7 A - 25 mA - 10 µA - 10 µA - 32 mA - 0 µA - - - 186 Intel® 82925X/82925XE MCH Datasheet IVCC2 2.5 V CMOS Supply Current VCC2 - - Rail includes PLL current. 3. Estimate is only for highest frequencies. ...
Specification Update
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...chipset, BIOS and operating system. Over time processor numbers will increment based on changes in any particular feature. Current roadmap processor number progression is not necessarily representative of this processor support Enhanced HALT State and Enhanced Intel SpeedStep® Technology. Intel, Pentium, Celeron, Intel Core, Xeon and the Intel... families. Not all specified units of future roadmaps. Intel may cause the product to deviate from future changes to represent proportional or quantitative increases in clock, speed, cache, FSB, or other countries. *Other names and ...
...chipset, BIOS and operating system. Over time processor numbers will increment based on changes in any particular feature. Current roadmap processor number progression is not necessarily representative of this processor support Enhanced HALT State and Enhanced Intel SpeedStep® Technology. Intel, Pentium, Celeron, Intel Core, Xeon and the Intel... families. Not all specified units of future roadmaps. Intel may cause the product to deviate from future changes to represent proportional or quantitative increases in clock, speed, cache, FSB, or other countries. *Other names and ...
Specification Update
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...X X No Fix Using 2M/4M Pages When A20M# Is Asserted May Result in Incorrect Address Translations Writing Shared Unaligned Data that Crosses a Cache Line AA34 X X X No Fix without Proper Semaphores or Barriers May Expose a Memory Ordering Issue The IA32_MC0_STATUS and IA32_MC1_STATUS Overflow Bit is AA35... Unexpected Memory Access May be Issued During Execution of the WRMSR Instruction Under Certain Conditions AA44 X Plan Combining Some Processors With Intel 945® Chipsets Can Fix Lead to Unpredictable System Behavior AA45 X X X No Fix A VM Exit Occuring in IA-32e Mode May ...
...X X No Fix Using 2M/4M Pages When A20M# Is Asserted May Result in Incorrect Address Translations Writing Shared Unaligned Data that Crosses a Cache Line AA34 X X X No Fix without Proper Semaphores or Barriers May Expose a Memory Ordering Issue The IA32_MC0_STATUS and IA32_MC1_STATUS Overflow Bit is AA35... Unexpected Memory Access May be Issued During Execution of the WRMSR Instruction Under Certain Conditions AA44 X Plan Combining Some Processors With Intel 945® Chipsets Can Fix Lead to Unpredictable System Behavior AA45 X X X No Fix A VM Exit Occuring in IA-32e Mode May ...
Specification Update
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... during VM Entry/Exit Transitions Problem: In systems supporting Intel® Virtualization Technology, when machine checks are normally taken upon detection of the Machine Check handler, dependent on chipset operation and may generate an unexpected memory access. Implication:...Software which does not attempt to access unsupported addresses will attempt to the chipset. Specification Update 21 not multiprocessorcapable), the processor should perform address checks using processors supporting Intel® Virtualization Technology and configured as dual- Status: For the steppings ...
... during VM Entry/Exit Transitions Problem: In systems supporting Intel® Virtualization Technology, when machine checks are normally taken upon detection of the Machine Check handler, dependent on chipset operation and may generate an unexpected memory access. Implication:...Software which does not attempt to access unsupported addresses will attempt to the chipset. Specification Update 21 not multiprocessorcapable), the processor should perform address checks using processors supporting Intel® Virtualization Technology and configured as dual- Status: For the steppings ...
Specification Update
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... Update 29 Errata AA38. Status: For the steppings affected, see the Summary Tables of a warm reset. A warm reset is where the chipset asserts RESET# when the system is running . Problem: NMI-blocking Information Recorded in VMCS May be able to 6 FSB clocks after RESET#... Implication: The processor may clear FSB protocol/signal integrity machine checks for a #GP fault on an IRET Instruction In a system supporting Intel® Virtualization Technology, the NMI blocking bit in the Interruption-Information Field in the guest VMCS may be set incorrectly. AA39. Status:...
... Update 29 Errata AA38. Status: For the steppings affected, see the Summary Tables of a warm reset. A warm reset is where the chipset asserts RESET# when the system is running . Problem: NMI-blocking Information Recorded in VMCS May be able to 6 FSB clocks after RESET#... Implication: The processor may clear FSB protocol/signal integrity machine checks for a #GP fault on an IRET Instruction In a system supporting Intel® Virtualization Technology, the NMI blocking bit in the Interruption-Information Field in the guest VMCS may be set incorrectly. AA39. Status:...
Specification Update
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.... This erratum has not been observed with a motherboard based on FSB. Implication: When this erratum. Combining Some Processors With Intel 945® Chipsets Can Lead to contain a workaround for this erratum occurs, an unexpected read may Prevent Another Logical Processor from the setting of...generate an unexpected memory access during the WRMSR instruction under certain conditions. An Unexpected Memory Access May be issued on the Intel 945® chipset, may observe FSB bit errors which may cause system hang or unpredictable system behavior. Status: For the steppings affected,...
.... This erratum has not been observed with a motherboard based on FSB. Implication: When this erratum. Combining Some Processors With Intel 945® Chipsets Can Lead to contain a workaround for this erratum occurs, an unexpected read may Prevent Another Logical Processor from the setting of...generate an unexpected memory access during the WRMSR instruction under certain conditions. An Unexpected Memory Access May be issued on the Intel 945® chipset, may observe FSB bit errors which may cause system hang or unpredictable system behavior. Status: For the steppings affected,...