Intel 925 - Pentium D 925 3.0GHz 800MHz 4MB-Cache Socket 775 CPU Support and Manuals
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Popular Intel 925 Manual Pages
English Product Guide - Page 3
...Messages and Indicators: information about BIOS error messages and beep codes. • B Regulatory Compliance: safety and EMC regulations, product certification.
Preface
This Product Guide gives information about how to prevent damage to hardware or loss of product features. • 2 Installing and Replacing Desktop Board Components: instructions on how to install the
desktop board and other...
English Product Guide - Page 18
... the supervisor or user password was entered. • Setting a user password restricts who can enter either the supervisor password or the user password to run the BIOS Setup program after you install a PCI/PCI Express add-in the BIOS Setup program.
Intel Desktop Board D925XHY Product Guide
Serial ATA and IDE Auto Configuration
If you install a PCI/PCI Express add-in card in...
English Product Guide - Page 40
....
When prompted, insert the floppy disk labeled RAID Driver. Install the Intel® 82801FR SATA RAID Controller driver. 3. Finish the Windows installation and install all necessary drivers. 4. Setting Up a "RAID Ready" System
The Intel Application Accelerator software offers the flexibility to http://support.intel.com/support/motherboards/desktop/
40 Use the arrow keys to Advanced...
English Product Guide - Page 51
... according to eight speakers. Multi-Channel Digital Audio
Two types of S/PDIF speakers that will be enabled. Installing and Replacing Desktop Board Components
Setting Up Full 7.1-Channel Surround Sound (Optional)
After installing the audio driver from the Intel Express Installer CD-ROM, the multi-channel audio feature can be used.
51 Figure 27 shows the location of back...
English Product Guide - Page 58
... process or the system may not function. 1. Intel Desktop Board D925XHY Product Guide
Obtaining the BIOS Update File You can obtain the BIOS update file through your computer supplier or by navigating to the Desktop Board D925XHY page on the Intel World Wide Web site at: http://support.intel.com/support/motherboards/desktop Navigate to a new version of the...
English Product Guide - Page 63
...63
Beep Codes
Beep 1, 3 8
Description Memory error Video error
BIOS Error Messages
When a recoverable error occurs during the memory test. ATAPI Incompatible Pri Slave Drive - ATAPI Incompatible
Corresponding drive is incorrect. Run Setup to protected mode during the POST, the BIOS displays an error message describing the problem.
Table 14. BIOS Error Messages
Error Message...
Data Sheet - Page 13
...; 925X Express chipset and Intel® 925XE Express chipset are designed for use with the Intel® Pentium® 4 processor in entry-level, uniprocessor, workstation platforms. The chipsets contain two components: 82925X or 82925XE Memory Controller Hub (MCH) for the host bridge and I/O Controller Hub 6 (ICH6) for Intel EM64T. The ICH6 is specifically designed to the processor, main memory...
Data Sheet - Page 16
...
Reference Documents
Document Title Intel® 925X/925XE Express Chipset Thermal Design Guide
Intel® I /O Controller Hub through the DMI interface. To increase system performance, the MCH incorporates several queues and a write cache. The 82925X MCH supports a FSB frequency of the Scalable Bus Protocol. Host-initiated memory cycles are decoded to the processor as shown in the LGA775...
Data Sheet - Page 18
... PCI Express Base Specification Revision 1.0a. These two channels provide a fixed arbitration scheme where VC1 is the chip-to-chip connection between the MCH and ICH6. Will send Intel-defined "End Of Interrupt"
broadcast message when initiated by the processor. • Message Signaled Interrupt (MSI) messages • SMI, SCI and SERR error indication • Legacy support...
Data Sheet - Page 73
... points can generate one of the SMI was sent for the access.
Once this bit is set, the EAP, CN, DN, and ES fields are locked to further single bit error updates until the processor clears this bit is set , the address, channel number, and device number that did not map into DRAM. A multiple bit...
Data Sheet - Page 113
... and de-assert messages. Hardwired to -Back Enable (FB2B): Not Applicable or Implemented. This bit, when set . Note that errors are reported if enabled either through this bit or through the PCI Express* specific bits in the Device Control Register 0 = The SERR message is generated by the MCH for Device 1 only under
conditions enabled individually...
Data Sheet - Page 136
...
15:8
Reserved
7:5
R/W
Max Payload Size
000b
000 = 128B maximum supported payload for PCI Express device specific capabilities. For a Root Port, the reporting of error messages received by this device, not error messages received across the link. as the set value.
Note that reporting of fatal errors is controlled exclusively by Root Port is generated.
1
R/W
Non-Fatal...
Specification Update - Page 21
... to a MOV from CR8 May Cause an Unexpected Memory Access
Problem:
In a system supporting Intel® Virtualization Technology and Intel® Extended Memory 64 Technology, if the "CR8-store exiting" bit in the processor-based VM-execution control field is set and the "use TPR shadow" bit is not set , a MOV from CR8 instruction executed by a Virtual Machine Extensions (VMX) guest...
Specification Update - Page 24
...63:32] of Changes.
Machine Check Exceptions May not Update Last-Exception Record MSRs (LERs)
Problem:
The Last-Exception Record MSRs (LERs) may not get updated when Machine Check Exceptions occur
Implication: When this erratum... a LVT entry is no Interrupt Service Routine (ISR) set . Status:
For the steppings affected, see the Summary Tables of Changes.
24
Specification Update
Specification Update - Page 25
...VMX mode may cause a memory access to an unexpected address.
Problem:
The Execution of VMPTRLD or VMREAD May Cause an Unexpected Memory Access
On processors supporting Intel® Virtualization Technology, executing a VMPTRLD or a VMREAD instruction outside of a VMPTRLD Instruction May Cause an Unexpected Memory Access
In a system supporting Intel® Virtualization Technology, executing...
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