Specification Update
Page 1
R Intel® Pentium® 4 Processor on 90 nm Process Specification Update September 2006 Notice: The Intel® Pentium® processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are documented in this Specification Update. Document Number: 302352-031
R Intel® Pentium® 4 Processor on 90 nm Process Specification Update September 2006 Notice: The Intel® Pentium® processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are documented in this Specification Update. Document Number: 302352-031
Specification Update
Page 2
...any time, without an Intel EM64T-enabled BIOS. Intel, Pentium, Celeron, Xeon, Intel SpeedStep, Intel Core, VTune and the Intel logo are not a measure of others. See http:// www.intel.com/info/hyperthreading/ for Intel EM64T. Copyright © 2004-2006, Intel Corporation 2 Intel® Pentium® 4 Processor on...FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. The Intel® Pentium® processor may contain design defects or errors known as the property of performance. NO LICENSE, EXPRESS OR ...
...any time, without an Intel EM64T-enabled BIOS. Intel, Pentium, Celeron, Xeon, Intel SpeedStep, Intel Core, VTune and the Intel logo are not a measure of others. See http:// www.intel.com/info/hyperthreading/ for Intel EM64T. Copyright © 2004-2006, Intel Corporation 2 Intel® Pentium® 4 Processor on...FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. The Intel® Pentium® processor may contain design defects or errors known as the property of performance. NO LICENSE, EXPRESS OR ...
Specification Update
Page 3
R Contents Revision History ...4 Preface...6 Summary Tables of Changes 8 General Information ...21 Identification Information 23 Errata ...30 Specification Changes ...73 Specification Clarifications 74 Documentation Changes 75 § Intel® Pentium® 4 Processor on 90 nm Process Specification Update 3
R Contents Revision History ...4 Preface...6 Summary Tables of Changes 8 General Information ...21 Identification Information 23 Errata ...30 Specification Changes ...73 Specification Clarifications 74 Documentation Changes 75 § Intel® Pentium® 4 Processor on 90 nm Process Specification Update 3
Specification Update
Page 4
...; Pentium® 4 processor on 90 nm process in 775-land package • Added 775-land package processor upside marking diagram in Figure 2 • Added processor identification information for 775-land package to Table 1 • Notes added to clarify that C0 errata only apply to 478 pin package ...-of-Cycle" June 22, 2004 Aug 2004 Sept 2004 Out of Cycle 9/23/2004 October 2004 November 2004 December 2004 December 2004 January 2005 4 Intel® Pentium® 4 Processor on 90 nm Process Specification Update reformatted document layout -004 -005 -006 -007 -008 -009 -010 -011 • ...
...; Pentium® 4 processor on 90 nm process in 775-land package • Added 775-land package processor upside marking diagram in Figure 2 • Added processor identification information for 775-land package to Table 1 • Notes added to clarify that C0 errata only apply to 478 pin package ...-of-Cycle" June 22, 2004 Aug 2004 Sept 2004 Out of Cycle 9/23/2004 October 2004 November 2004 December 2004 December 2004 January 2005 4 Intel® Pentium® 4 Processor on 90 nm Process Specification Update reformatted document layout -004 -005 -006 -007 -008 -009 -010 -011 • ...
Specification Update
Page 5
... 2005 October 2005 "Out of Cycle" November 14, 2005 December 2005 January 2006 February 2006 March 2006 April 2006 May 2006 June 2006 September 2006 Intel® Pentium® 4 Processor on 90 nm Process Specification Update 5
... 2005 October 2005 "Out of Cycle" November 14, 2005 December 2005 January 2006 February 2006 March 2006 April 2006 May 2006 June 2006 September 2006 Intel® Pentium® 4 Processor on 90 nm Process Specification Update 5
Specification Update
Page 6
...Developer's Manual Volume 3B: System Programming Guide, document 253669 Document Number http://developer.intel.com/design/p entium4/manuals/index_new.htm 6 Intel® Pentium® 4 Processor on 90 nm Process Datasheet Intel® Pentium® 4 Processors 570/571, 560/561, 550/551, 540/541, 530/...-Threading Technology Datasheet On 90 nm Process in 775-land LGA Package and supporting Intel® Extended Memory 64 TechnologyΦ Intel® Pentium® 4 Processor 6xxΔ Sequence and Intel® Pentium® 4 Processor Extreme Edition Datasheet On 90 nm Process in the 775- ...
...Developer's Manual Volume 3B: System Programming Guide, document 253669 Document Number http://developer.intel.com/design/p entium4/manuals/index_new.htm 6 Intel® Pentium® 4 Processor on 90 nm Process Datasheet Intel® Pentium® 4 Processors 570/571, 560/561, 550/551, 540/541, 530/...-Threading Technology Datasheet On 90 nm Process in 775-land LGA Package and supporting Intel® Extended Memory 64 TechnologyΦ Intel® Pentium® 4 Processor 6xxΔ Sequence and Intel® Pentium® 4 Processor Extreme Edition Datasheet On 90 nm Process in the 775- ...
Specification Update
Page 7
...'s impact to the current published specifications. Documentation Changes include typos, errors, or omissions from published specifications. Errata may cause the Intel® Pentium® processor's behavior to read all notes associated with any given stepping must assume that all devices. Specification Changes are differentiated ... be incorporated in the processor identification information table. as described in the next release of the specifications. § Intel® Pentium® 4 Processor on all errata documented for that stepping are design defects or errors.
...'s impact to the current published specifications. Documentation Changes include typos, errors, or omissions from published specifications. Errata may cause the Intel® Pentium® processor's behavior to read all notes associated with any given stepping must assume that all devices. Specification Changes are differentiated ... be incorporated in the processor identification information table. as described in the next release of the specifications. § Intel® Pentium® 4 Processor on all errata documented for that stepping are design defects or errors.
Specification Update
Page 8
... update that will be fixed in Intel's microprocessor Specification Updates: A = Intel® Pentium® II processor B = Mobile Intel® Pentium® II processor C = Intel® Celeron® processor D = Intel® Pentium® II Xeon® processor E = Intel® Pentium® III processor F = Intel® Pentium® processor Extreme Edition G = Intel® Pentium® III Xeon® processor H = Mobile Intel® Celeron® processor at 466...
... update that will be fixed in Intel's microprocessor Specification Updates: A = Intel® Pentium® II processor B = Mobile Intel® Pentium® II processor C = Intel® Celeron® processor D = Intel® Pentium® II Xeon® processor E = Intel® Pentium® III processor F = Intel® Pentium® processor Extreme Edition G = Intel® Pentium® III Xeon® processor H = Mobile Intel® Celeron® processor at 466...
Specification Update
Page 9
... = Intel® Pentium® processor Extreme Edition and Intel® Pentium® D processor on 65nm process AB = Intel® Pentium® 4 processor on 65 nm process AC = Intel® Celeron® Processor in Micro-FCPGA Package W = Intel® Celeron® M processor X = Intel® Pentium®...to Speculative Page Walks to 8MB L3 Cache V = Mobile Intel® Celeron® processor on 0.13 Micron Process in 478 Pin Package AD = Intel® Celeron® D processor on 65 nm process AE = Intel® CoreTM Duo Processor and Intel® CoreTM Solo processor on 65nm process NO.
... = Intel® Pentium® processor Extreme Edition and Intel® Pentium® D processor on 65nm process AB = Intel® Pentium® 4 processor on 65 nm process AC = Intel® Celeron® Processor in Micro-FCPGA Package W = Intel® Celeron® M processor X = Intel® Pentium®...to Speculative Page Walks to 8MB L3 Cache V = Mobile Intel® Celeron® processor on 0.13 Micron Process in 478 Pin Package AD = Intel® Celeron® D processor on 65 nm process AE = Intel® CoreTM Duo Processor and Intel® CoreTM Solo processor on 65nm process NO.
Specification Update
Page 10
... Parity Error in the L1 Cache May Fix Cause the Processor to Hang R20 X Fixed BPM4# Signal Not Being Asserted According to Hang Temporarily 10 Intel® Pentium® 4 Processor on 90 nm Process Specification Update
... Parity Error in the L1 Cache May Fix Cause the Processor to Hang R20 X Fixed BPM4# Signal Not Being Asserted According to Hang Temporarily 10 Intel® Pentium® 4 Processor on 90 nm Process Specification Update
Specification Update
Page 11
... in a Task-State Segment (TSS) May be Incorrect R37 X X X X X X X X X No Fix Using STPCLK# and Executing Code From Very Slow Memory Could Lead to a System Hang Intel® Pentium® 4 Processor on an FP Instruction R27 X X X X X X X X X No xAPIC May Not Report Some Illegal Fix Vector Errors R28 X X X X X Fixed Enabling No-Eviction Mode (NEM...
... in a Task-State Segment (TSS) May be Incorrect R37 X X X X X X X X X No Fix Using STPCLK# and Executing Code From Very Slow Memory Could Lead to a System Hang Intel® Pentium® 4 Processor on an FP Instruction R27 X X X X X X X X X No xAPIC May Not Report Some Illegal Fix Vector Errors R28 X X X X X Fixed Enabling No-Eviction Mode (NEM...
Specification Update
Page 12
... Not Serialize the Processor Execution R52 X X X Incorrect Access Controls to Fixed MSR_LASTBRANCH_0_FROM_LI P MSR Registers R53 X X X X Fixed Recursive Page Walks May Cause a System Hang 12 Intel® Pentium® 4 Processor on the High Half of a Floating Point Line Split may not be Captured R40 X CPUID Instruction May Report Fixed Incorrect L2 Associativity in...
... Not Serialize the Processor Execution R52 X X X Incorrect Access Controls to Fixed MSR_LASTBRANCH_0_FROM_LI P MSR Registers R53 X X X X Fixed Recursive Page Walks May Cause a System Hang 12 Intel® Pentium® 4 Processor on the High Half of a Floating Point Line Split may not be Captured R40 X CPUID Instruction May Report Fixed Incorrect L2 Associativity in...
Specification Update
Page 13
... Execute Disable Bit Function is Enabled a Page-fault in a Mispredicted Branch May Result in Virtual-8086 Mode on Processors with Intel® Extended Memory 64 Technology (Intel® EM64T) Enabled Processor May Fault when the X X X No Fix Upper 8 Bytes of Segment Selector is in...; Fixed Upper 32 Bits of FS/GS with Null Base May not get Cleared in a Page-fault Exception Intel® Pentium® 4 Processor on a Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) FXRSTOR May Not Restore Non- Summary Tables of ESP that References a Non- X X ...
... Execute Disable Bit Function is Enabled a Page-fault in a Mispredicted Branch May Result in Virtual-8086 Mode on Processors with Intel® Extended Memory 64 Technology (Intel® EM64T) Enabled Processor May Fault when the X X X No Fix Upper 8 Bytes of Segment Selector is in...; Fixed Upper 32 Bits of FS/GS with Null Base May not get Cleared in a Page-fault Exception Intel® Pentium® 4 Processor on a Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) FXRSTOR May Not Restore Non- Summary Tables of ESP that References a Non- X X ...
Specification Update
Page 14
... Value For One R76 X X X Fixed Instruction Following a Mode Transition in a Hyper-Threading Enabled Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T). 14 Intel® Pentium® 4 Processor on a Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) L-bit of the CS and LMA bit of Changes R NO. C01 D0 LD02 E0...
... Value For One R76 X X X Fixed Instruction Following a Mode Transition in a Hyper-Threading Enabled Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T). 14 Intel® Pentium® 4 Processor on a Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) L-bit of the CS and LMA bit of Changes R NO. C01 D0 LD02 E0...
Specification Update
Page 15
... May Fail to Execute to Completion or R81 X X X X Fixed May Write to Incorrect Memory Locations on Processors Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) An REP LODSB or an REP LODSD or an REP LODSQ Instruction with 32-bit Mode PAE (Page Address... Extension) Paging May Cause Processor to Hang Intel® Pentium® 4 Processor on Processors Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) A Data Access which Spans Both R83 X X X X No the Canonical and the...
... May Fail to Execute to Completion or R81 X X X X Fixed May Write to Incorrect Memory Locations on Processors Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) An REP LODSB or an REP LODSD or an REP LODSQ Instruction with 32-bit Mode PAE (Page Address... Extension) Paging May Cause Processor to Hang Intel® Pentium® 4 Processor on Processors Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) A Data Access which Spans Both R83 X X X X No the Canonical and the...
Specification Update
Page 16
...X5 X5 Fixed FXSAVE Instruction May Result in Incorrect Data on Processors Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) Fixed Compatibility Mode STOS Instructions May Alter RSI Register Results on a Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) Fixed LDT Descriptor Which Crosses 16 bit Boundary Access Does...in an Invalid Opcode Exception X No Fix The Processor May Issue Multiple Code Fetches to the Same Cache Line for Systems with Slow Memory 16 Intel® Pentium® 4 Processor on 90 nm Process Specification Update
...X5 X5 Fixed FXSAVE Instruction May Result in Incorrect Data on Processors Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) Fixed Compatibility Mode STOS Instructions May Alter RSI Register Results on a Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) Fixed LDT Descriptor Which Crosses 16 bit Boundary Access Does...in an Invalid Opcode Exception X No Fix The Processor May Issue Multiple Code Fetches to the Same Cache Line for Systems with Slow Memory 16 Intel® Pentium® 4 Processor on 90 nm Process Specification Update
Specification Update
Page 17
...May Cause an Unexpected Memory Access R110 X X X X X No Fix IRET under Certain Conditions May Cause an Unexpected Alignment Check Exception Intel® Pentium® 4 Processor on 90 nm Process Specification Update 17 C01 D0 LD02 E0 LE02 G11 LG12 LN02 LR02 Plan ERRATA Writing the Local ...Cause an Unexpected Interrupt Access to an Unsupported Address Range in Uniprocessor (UP) or R99 X No Dual-processor (DP) Systems Fix Supporting Intel® Virtualization Technology May Not Trigger Appropriate Actions R100 X No Fix VM Exit Due to a MOV from CR8 May Cause an Unexpected...
...May Cause an Unexpected Memory Access R110 X X X X X No Fix IRET under Certain Conditions May Cause an Unexpected Alignment Check Exception Intel® Pentium® 4 Processor on 90 nm Process Specification Update 17 C01 D0 LD02 E0 LE02 G11 LG12 LN02 LR02 Plan ERRATA Writing the Local ...Cause an Unexpected Interrupt Access to an Unsupported Address Range in Uniprocessor (UP) or R99 X No Dual-processor (DP) Systems Fix Supporting Intel® Virtualization Technology May Not Trigger Appropriate Actions R100 X No Fix VM Exit Due to a MOV from CR8 May Cause an Unexpected...
Specification Update
Page 18
... X X No Fix Using 2M/4M Pages When A20M# Is Asserted May Result in the 775-land LGA package 18 Intel® Pentium® 4 Processor on 90 nm Process Specification Update Prefix "L" denotes Pentium 4 processor on 90 nm Process in Incorrect Address Translations Writing Shared Unaligned Data that R120 X X X X X X ... Bus R123 X X X X X X X X X No Fix Lock Transactions on 90 nm Process in the 478-pin package 2. Only applies to Pentium® 4 processor on One Logical Processor may Prevent Another Logical Processor from 64-bit Host to a Different Mode R114...
... X X No Fix Using 2M/4M Pages When A20M# Is Asserted May Result in the 775-land LGA package 18 Intel® Pentium® 4 Processor on 90 nm Process Specification Update Prefix "L" denotes Pentium 4 processor on 90 nm Process in Incorrect Address Translations Writing Shared Unaligned Data that R120 X X X X X X ... Bus R123 X X X X X X X X X No Fix Lock Transactions on 90 nm Process in the 478-pin package 2. Only applies to Pentium® 4 processor on One Logical Processor may Prevent Another Logical Processor from 64-bit Host to a Different Mode R114...
Specification Update
Page 19
NO. SPECIFICATION CLARIFICATIONS There are no Specification Clarification in this Specification Update revision § Intel® Pentium® 4 Processor on 90 nm Process Specification Update 19 SPECIFICATION CHANGES R1 Land Assignment Specification ... CHANGES There are no documentation changes in BIOS. This erratum applies to Pentium 4 processors for Single-Processor Server/Workstation Platform configurations only. Non-server/workstation desktop configurations do not support the Intel Extended Memory 64 Technology. 4. Summary Tables of Changes R 3. This erratum...
NO. SPECIFICATION CLARIFICATIONS There are no Specification Clarification in this Specification Update revision § Intel® Pentium® 4 Processor on 90 nm Process Specification Update 19 SPECIFICATION CHANGES R1 Land Assignment Specification ... CHANGES There are no documentation changes in BIOS. This erratum applies to Pentium 4 processors for Single-Processor Server/Workstation Platform configurations only. Non-server/workstation desktop configurations do not support the Intel Extended Memory 64 Technology. 4. Summary Tables of Changes R 3. This erratum...
Specification Update
Page 20
Summary Tables of Changes R 20 Intel® Pentium® 4 Processor on 90 nm Process Specification Update
Summary Tables of Changes R 20 Intel® Pentium® 4 Processor on 90 nm Process Specification Update